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| author | Tristan Gingold <tgingold@free.fr> | 2020-05-25 18:49:59 +0200 |
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| committer | Tristan Gingold <tgingold@free.fr> | 2020-05-25 18:49:59 +0200 |
| commit | dc90bedd6d86df9a9ef74bcdd51c7c3400669f29 (patch) | |
| tree | 6e258692562a5bd533fd4d9504dd29d1a32927de /doc/using/CommandReference.rst | |
| parent | 4e5ab2e5158662813ab3dfed096edfbed3716a62 (diff) | |
| download | ghdl-dc90bedd6d86df9a9ef74bcdd51c7c3400669f29.tar.gz ghdl-dc90bedd6d86df9a9ef74bcdd51c7c3400669f29.tar.bz2 ghdl-dc90bedd6d86df9a9ef74bcdd51c7c3400669f29.zip | |
doc: move -C/--syn-binding doc to InvokingGHDL.
Diffstat (limited to 'doc/using/CommandReference.rst')
| -rw-r--r-- | doc/using/CommandReference.rst | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/doc/using/CommandReference.rst b/doc/using/CommandReference.rst index f66335d2c..6284db18b 100644 --- a/doc/using/CommandReference.rst +++ b/doc/using/CommandReference.rst @@ -142,7 +142,7 @@ Performs only the second stage of the elaboration command: the executable is cre .. index:: cmd GCC/LLVM list link List link [``--list-link``] -------------------------------- +--------------------------- .. option:: --list-link <primary_unit [secondary_unit]> @@ -154,22 +154,21 @@ This command may be used only after a bind command. GHDL displays all the files * Filter the output of ``--list-link`` with e.g. ``sed``. * Provide an additional non-anonymous version script: ``-Wl,-Wl,--version-script=file.ver``. -Options -======= - -.. option:: --mb-comments, -C +.. index:: cmd XML generation -Allow multi-bytes chars in a comment. +XML tree generation [``--file-to-xml``] +--------------------------------------- -.. option:: --syn-binding +.. option:: --file-to-xml -Use synthesizer rules for component binding. During elaboration, if a component is not bound to an entity using VHDL LRM rules, try to find in any known library an entity whose name is the same as the component name. + Outputs an XML representation of the decorated syntax tree for the input file and its dependencies. It can be used for VHDL tooling using semantic information, like style checkers, documentation extraction, complexity estimation, etc. -This rule is known as the synthesizer rule. +.. WARNING:: + * The AST slightly changes from time to time (particularly when new nodes are added for new language features), so be liberal in what is allowed by your tool. Also, the XML can be quite large so consider it only during prototyping. + * Note that at this time there is no XML dump of the elaborated design. -There are two key points: normal VHDL LRM rules are tried first and entities are searched only in known libraries. A known library is a library which has been named in your design. - -This option is only useful during elaboration. +Options +======= .. option:: --GHDL1<=COMMAND> |