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author1138-4EB <1138-4EB@users.noreply.github.com>2017-02-19 08:20:38 +0100
committertgingold <tgingold@users.noreply.github.com>2017-12-10 12:02:05 +0100
commitc8c53919d4cfad5eef122ad8a63ff9a26a7db125 (patch)
tree732edaff88b9c1ab50d4f75c458a271baf5c300b /doc/intro
parent4c1118d130c5b2dd8aef5ef486138db002dcfda7 (diff)
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Add dots to TODOs
Diffstat (limited to 'doc/intro')
-rw-r--r--doc/intro/Contributing.rst8
-rw-r--r--doc/intro/Copyrights.rst4
-rw-r--r--doc/intro/WhatIsVHDL.rst4
3 files changed, 5 insertions, 11 deletions
diff --git a/doc/intro/Contributing.rst b/doc/intro/Contributing.rst
index 8a0ba30bc..e76f83628 100644
--- a/doc/intro/Contributing.rst
+++ b/doc/intro/Contributing.rst
@@ -65,13 +65,11 @@ you have not understood some parts of this manual, please tell me.
English is not my mother tongue, so this manual may not be well-written.
Again, rewriting part of it is a good way to improve it.
----
+.. TODO:: topic
-@TODO:
-
-- Reporting bugs
+ - Reporting bugs
- [1138: Issues, search first]
- Minimum-(non)-Working-Example (MWE)
-- Pull Requests (PRs)
+ - Pull Requests (PRs)
- [1138: check chapter 2 -> building -> GHDL -> directory structure]
- [1138: beware that some commit messages can `automatically close <https://help.github.com/articles/closing-issues-via-commit-messages/>`_ PRs] \ No newline at end of file
diff --git a/doc/intro/Copyrights.rst b/doc/intro/Copyrights.rst
index 06cc7e4a9..a2f15f177 100644
--- a/doc/intro/Copyrights.rst
+++ b/doc/intro/Copyrights.rst
@@ -44,9 +44,7 @@ sources. To my mind, this is not a real restriction, since there is no
points in distributing VHDL executable. Please, send a comment
(:ref:`Reporting_bugs`) if you don't like this policy.
-----------------
-
-.. TODO: topic
+.. TODO:: topic
https://www.gnu.org/licenses/old-licenses/gpl-2.0.html
diff --git a/doc/intro/WhatIsVHDL.rst b/doc/intro/WhatIsVHDL.rst
index b70b3a723..852168f78 100644
--- a/doc/intro/WhatIsVHDL.rst
+++ b/doc/intro/WhatIsVHDL.rst
@@ -28,8 +28,6 @@ Like a program written in another hardware description language, a `VHDL`
program can be transformed with a :dfn:`synthesis tool` into a netlist, that is,
a detailed gate-level implementation.
-----------------
-
-.. TODO: topic
+.. TODO:: topic
@1138 very very briefly explain that there are four major verions: 87, 93, 02 and 08 \ No newline at end of file