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| author | umarcor <38422348+umarcor@users.noreply.github.com> | 2020-04-10 07:48:47 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-04-10 07:48:47 +0200 |
| commit | 2bea592952b8a9f9860bb646ddf72d26eac4ad29 (patch) | |
| tree | 52f50b443a2d15a3f49d8cee8cd77538a9fa1292 /doc/internals/Overview.rst | |
| parent | 713cd87326302ee2ad750ec6d9d3a601f315e66b (diff) | |
| download | ghdl-2bea592952b8a9f9860bb646ddf72d26eac4ad29.tar.gz ghdl-2bea592952b8a9f9860bb646ddf72d26eac4ad29.tar.bz2 ghdl-2bea592952b8a9f9860bb646ddf72d26eac4ad29.zip | |
update doc (synth, overview, generics, etc.) (#1205)
* doc: extend info about setting generics through the CLI
* doc: rename 'Command Reference' to 'Additional Command Reference'
* doc: use '``' instead of ':samp:'
* doc: update info about synthesis
* doc: add references to sources in internals/Overview
* doc: add diagram to internals/Overview
Diffstat (limited to 'doc/internals/Overview.rst')
| -rw-r--r-- | doc/internals/Overview.rst | 19 |
1 files changed, 13 insertions, 6 deletions
diff --git a/doc/internals/Overview.rst b/doc/internals/Overview.rst index 3be8772b4..fd29f5832 100644 --- a/doc/internals/Overview.rst +++ b/doc/internals/Overview.rst @@ -3,16 +3,23 @@ Overview ######## -`GHDL` is architectured like a traditionnal compiler. It has: +.. image:: img/internals.png + :width: 350px + :align: center -* a driver (sources in :file:`src/ghdldrv`) to call the programs (compiler, assembler, linker) if needed. +`GHDL` is architectured like a traditionnal compiler. It has: -* a library (sources in :file:`src/grt`) to help execution at run-time. +* a driver (sources in :ghdlsrc:`src/ghdldrv <ghdldrv>`) to call the programs (compiler, assembler, linker) if needed. -* a front-end (sources in :file:`src/vhdl`) to parse and analyse VHDL. +* a runtime library named GRT (sources in :ghdlsrc:`src/grt <grt>`) to help execution at run-time. This ensures that execution is cycle-accurate. -* a back-end (in fact many, sources are in :file:`src/ortho`) to generate code. +* a front-end (sources in :ghdlsrc:`src/vhdl <vhdl>`) to parse and analyse VHDL. See :ref:`INT:Frontend` and :ref:`INT:AST`. -The architecture is modular. For example, it is possible to use the front-end in the `libghdl` library for the language server or to do synthesis (sources in :file:`src/synth`) instead of code generation. +* multiple back-ends to generate either code or netlists. + + * Three for :ref:`simulation <USING:Simulation>` (sources are in :ghdlsrc:`src/ortho <ortho>`): mcode, LLVM and GCC. See :ref:`BUILD`. + * Two for :ref:`synthesis <USING:Synthesis>` (sources in :ghdlsrc:`src/synth <synth>`): :ref:`--synth <Synth:command>` and :ref:`Synth:plugin`. + +The architecture is modular. For example, the front-end in the ``libghdl`` library is used for the language server. The main work is performed by the front-end, which is documented in the next chapter. |