std_names: add syn_black_box

3 files changed, 185 insertions, 182 deletions

diff --git a/pyGHDL/libghdl/std_names.py b/pyGHDL/libghdl/std_names.py
index 5af03ac5a..098e2b34e 100644
--- a/pyGHDL/libghdl/std_names.py
+++ b/pyGHDL/libghdl/std_names.py
@@ -646,184 +646,185 @@ class Name:
     Gclk = 849
     Loc = 850
     Keep = 851
-    Last_Synthesis = 851
-    First_Directive = 852
-    Define = 852
-    Endif = 853
-    Ifdef = 854
-    Ifndef = 855
-    Include = 856
-    Timescale = 857
-    Undef = 858
-    Protect = 859
-    Begin_Protected = 860
-    End_Protected = 861
-    Key_Block = 862
-    Data_Block = 863
-    Line = 864
-    Celldefine = 865
-    Endcelldefine = 866
-    Default_Nettype = 867
-    Resetall = 868
-    Last_Directive = 868
-    First_Systask = 869
-    Bits = 869
-    D_Root = 870
-    D_Unit = 871
-    Last_Systask = 871
-    First_SV_Method = 872
-    Size = 872
-    Insert = 873
-    Delete = 874
-    Pop_Front = 875
-    Pop_Back = 876
-    Push_Front = 877
-    Push_Back = 878
-    Name = 879
-    Len = 880
-    Substr = 881
-    Exists = 882
-    Atoi = 883
-    Itoa = 884
-    Find = 885
-    Find_Index = 886
-    Find_First = 887
-    Find_First_Index = 888
-    Find_Last = 889
-    Find_Last_Index = 890
-    Num = 891
-    Randomize = 892
-    Pre_Randomize = 893
-    Post_Randomize = 894
-    Srandom = 895
-    Get_Randstate = 896
-    Set_Randstate = 897
-    Seed = 898
-    State = 899
-    Last_SV_Method = 899
-    First_BSV = 900
-    uAction = 900
-    uActionValue = 901
-    BVI = 902
-    uC = 903
-    uCF = 904
-    uE = 905
-    uSB = 906
-    uSBR = 907
-    Action = 908
-    Endaction = 909
-    Actionvalue = 910
-    Endactionvalue = 911
-    Ancestor = 912
-    Clocked_By = 913
-    Default_Clock = 914
-    Default_Reset = 915
-    Dependencies = 916
-    Deriving = 917
-    Determines = 918
-    Enable = 919
-    Ifc_Inout = 920
-    Input_Clock = 921
-    Input_Reset = 922
-    Instance = 923
-    Endinstance = 924
-    Let = 925
-    Match = 926
-    Method = 927
-    Endmethod = 928
-    Numeric = 929
-    Output_Clock = 930
-    Output_Reset = 931
-    Par = 932
-    Endpar = 933
-    Path = 934
-    Provisos = 935
-    Ready = 936
-    Reset_By = 937
-    Rule = 938
-    Endrule = 939
-    Rules = 940
-    Endrules = 941
-    Same_Family = 942
-    Schedule = 943
-    Seq = 944
-    Endseq = 945
-    Typeclass = 946
-    Endtypeclass = 947
-    Valueof = 948
-    uValueof = 949
-    Last_BSV = 949
-    First_Comment = 950
-    Psl = 950
-    Pragma = 951
-    Synthesis = 952
-    Synopsys = 953
-    Translate_Off = 954
-    Translate_On = 955
-    Translate = 956
-    Synthesis_Off = 957
-    Synthesis_On = 958
-    Off = 959
-    Full_Case = 960
-    Parallel_Case = 961
-    Last_Comment = 961
-    First_PSL = 962
-    A = 962
-    Af = 963
-    Ag = 964
-    Ax = 965
-    Abort = 966
-    Assume_Guarantee = 967
-    Async_Abort = 968
-    Before = 969
-    Clock = 970
-    E = 971
-    Ef = 972
-    Eg = 973
-    Ex = 974
-    Endpoint = 975
-    Eventually = 976
-    Fairness = 977
-    Fell = 978
-    Forall = 979
-    G = 980
-    Inf = 981
-    Never = 982
-    Next_A = 983
-    Next_E = 984
-    Next_Event = 985
-    Next_Event_A = 986
-    Next_Event_E = 987
-    Onehot = 988
-    Onehot0 = 989
-    Prev = 990
-    Rose = 991
-    Strong = 992
-    Sync_Abort = 993
-    W = 994
-    Whilenot = 995
-    Within = 996
-    X = 997
-    Last_PSL = 997
-    First_Edif = 998
-    Celltype = 1008
-    View = 1009
-    Viewtype = 1010
-    Direction = 1011
-    Contents = 1012
-    Net = 1013
-    Viewref = 1014
-    Cellref = 1015
-    Libraryref = 1016
-    Portinstance = 1017
-    Joined = 1018
-    Portref = 1019
-    Instanceref = 1020
-    Design = 1021
-    Designator = 1022
-    Owner = 1023
-    Member = 1024
-    Number = 1025
-    Rename = 1026
-    Userdata = 1027
-    Last_Edif = 1027
+    Syn_Black_Box = 852
+    Last_Synthesis = 852
+    First_Directive = 853
+    Define = 853
+    Endif = 854
+    Ifdef = 855
+    Ifndef = 856
+    Include = 857
+    Timescale = 858
+    Undef = 859
+    Protect = 860
+    Begin_Protected = 861
+    End_Protected = 862
+    Key_Block = 863
+    Data_Block = 864
+    Line = 865
+    Celldefine = 866
+    Endcelldefine = 867
+    Default_Nettype = 868
+    Resetall = 869
+    Last_Directive = 869
+    First_Systask = 870
+    Bits = 870
+    D_Root = 871
+    D_Unit = 872
+    Last_Systask = 872
+    First_SV_Method = 873
+    Size = 873
+    Insert = 874
+    Delete = 875
+    Pop_Front = 876
+    Pop_Back = 877
+    Push_Front = 878
+    Push_Back = 879
+    Name = 880
+    Len = 881
+    Substr = 882
+    Exists = 883
+    Atoi = 884
+    Itoa = 885
+    Find = 886
+    Find_Index = 887
+    Find_First = 888
+    Find_First_Index = 889
+    Find_Last = 890
+    Find_Last_Index = 891
+    Num = 892
+    Randomize = 893
+    Pre_Randomize = 894
+    Post_Randomize = 895
+    Srandom = 896
+    Get_Randstate = 897
+    Set_Randstate = 898
+    Seed = 899
+    State = 900
+    Last_SV_Method = 900
+    First_BSV = 901
+    uAction = 901
+    uActionValue = 902
+    BVI = 903
+    uC = 904
+    uCF = 905
+    uE = 906
+    uSB = 907
+    uSBR = 908
+    Action = 909
+    Endaction = 910
+    Actionvalue = 911
+    Endactionvalue = 912
+    Ancestor = 913
+    Clocked_By = 914
+    Default_Clock = 915
+    Default_Reset = 916
+    Dependencies = 917
+    Deriving = 918
+    Determines = 919
+    Enable = 920
+    Ifc_Inout = 921
+    Input_Clock = 922
+    Input_Reset = 923
+    Instance = 924
+    Endinstance = 925
+    Let = 926
+    Match = 927
+    Method = 928
+    Endmethod = 929
+    Numeric = 930
+    Output_Clock = 931
+    Output_Reset = 932
+    Par = 933
+    Endpar = 934
+    Path = 935
+    Provisos = 936
+    Ready = 937
+    Reset_By = 938
+    Rule = 939
+    Endrule = 940
+    Rules = 941
+    Endrules = 942
+    Same_Family = 943
+    Schedule = 944
+    Seq = 945
+    Endseq = 946
+    Typeclass = 947
+    Endtypeclass = 948
+    Valueof = 949
+    uValueof = 950
+    Last_BSV = 950
+    First_Comment = 951
+    Psl = 951
+    Pragma = 952
+    Synthesis = 953
+    Synopsys = 954
+    Translate_Off = 955
+    Translate_On = 956
+    Translate = 957
+    Synthesis_Off = 958
+    Synthesis_On = 959
+    Off = 960
+    Full_Case = 961
+    Parallel_Case = 962
+    Last_Comment = 962
+    First_PSL = 963
+    A = 963
+    Af = 964
+    Ag = 965
+    Ax = 966
+    Abort = 967
+    Assume_Guarantee = 968
+    Async_Abort = 969
+    Before = 970
+    Clock = 971
+    E = 972
+    Ef = 973
+    Eg = 974
+    Ex = 975
+    Endpoint = 976
+    Eventually = 977
+    Fairness = 978
+    Fell = 979
+    Forall = 980
+    G = 981
+    Inf = 982
+    Never = 983
+    Next_A = 984
+    Next_E = 985
+    Next_Event = 986
+    Next_Event_A = 987
+    Next_Event_E = 988
+    Onehot = 989
+    Onehot0 = 990
+    Prev = 991
+    Rose = 992
+    Strong = 993
+    Sync_Abort = 994
+    W = 995
+    Whilenot = 996
+    Within = 997
+    X = 998
+    Last_PSL = 998
+    First_Edif = 999
+    Celltype = 1009
+    View = 1010
+    Viewtype = 1011
+    Direction = 1012
+    Contents = 1013
+    Net = 1014
+    Viewref = 1015
+    Cellref = 1016
+    Libraryref = 1017
+    Portinstance = 1018
+    Joined = 1019
+    Portref = 1020
+    Instanceref = 1021
+    Design = 1022
+    Designator = 1023
+    Owner = 1024
+    Member = 1025
+    Number = 1026
+    Rename = 1027
+    Userdata = 1028
+    Last_Edif = 1028
diff --git a/src/std_names.adb b/src/std_names.adb
index 245c8a1a9..cf3ffeef5 100644
--- a/src/std_names.adb
+++ b/src/std_names.adb
@@ -687,6 +687,7 @@ package body Std_Names is
       Def ("gclk",               Name_Gclk);
       Def ("loc",                Name_Loc);
       Def ("keep",               Name_Keep);
+      Def ("syn_black_box",      Name_Syn_Black_Box);
 
       --  Verilog directives
       Def ("define",          Name_Define);
diff --git a/src/std_names.ads b/src/std_names.ads
index 5fc5bf919..f1165488b 100644
--- a/src/std_names.ads
+++ b/src/std_names.ads
@@ -772,7 +772,8 @@ package Std_Names is
    Name_Gclk               : constant Name_Id := Name_First_Synthesis + 004;
    Name_Loc                : constant Name_Id := Name_First_Synthesis + 005;
    Name_Keep               : constant Name_Id := Name_First_Synthesis + 006;
-   Name_Last_Synthesis     : constant Name_Id := Name_Keep;
+   Name_Syn_Black_Box      : constant Name_Id := Name_First_Synthesis + 007;
+   Name_Last_Synthesis     : constant Name_Id := Name_Syn_Black_Box;
 
    --  Verilog Directives.
    Name_First_Directive : constant Name_Id := Name_Last_Synthesis + 1;