testsuite/synth: add test for #1264

3 files changed, 51 insertions, 0 deletions

diff --git a/testsuite/synth/issue1264/issue.vhdl b/testsuite/synth/issue1264/issue.vhdl
new file mode 100644
index 000000000..99075f4d7
--- /dev/null
+++ b/testsuite/synth/issue1264/issue.vhdl
@@ -0,0 +1,19 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity issue is
+    port
+        (srl_usn : out unsigned (8-1 downto 0);
+         sll_usn : out unsigned (8-1 downto 0);
+         srl_sgn : out   signed (8-1 downto 0);
+         sll_sgn : out   signed (8-1 downto 0));
+end issue;
+
+architecture beh of issue is
+begin
+    srl_usn <= unsigned'(b"0000_0000") srl 1; -- work
+    sll_usn <= unsigned'(b"0000_0000") sll 1; -- fail
+    srl_sgn <=   signed'(b"0000_0000") srl 1; -- fail
+    sll_sgn <=   signed'(b"0000_0000") sll 1; -- fail
+end architecture beh;
diff --git a/testsuite/synth/issue1264/repro.vhdl b/testsuite/synth/issue1264/repro.vhdl
new file mode 100644
index 000000000..ad67b84a9
--- /dev/null
+++ b/testsuite/synth/issue1264/repro.vhdl
@@ -0,0 +1,19 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity repro is
+    port (r : out std_logic);
+end repro;
+
+architecture beh of repro is
+begin
+  r <= '1';
+
+  assert (unsigned'(b"1001_0001") srl 1) = b"0100_1000";
+  assert (unsigned'(b"1001_0001") sll 1) = b"0010_0010";
+  assert (signed'(b"1001_0001") srl 1) = b"0100_1000";
+  assert (signed'(b"1001_0001") sll 1) = b"0010_0010";
+
+  --  assert false report to_bstring(signed'(b"1001_0001") srl 1);
+end architecture beh;
diff --git a/testsuite/synth/issue1264/testsuite.sh b/testsuite/synth/issue1264/testsuite.sh
new file mode 100755
index 000000000..f254e61b0
--- /dev/null
+++ b/testsuite/synth/issue1264/testsuite.sh
@@ -0,0 +1,13 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+analyze repro.vhdl
+elab_simulate repro
+clean
+
+synth_analyze issue
+synth_analyze repro
+clean
+
+echo "Test successful"