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| author | Tristan Gingold <tgingold@free.fr> | 2019-07-30 20:57:48 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-07-30 20:57:48 +0200 |
| commit | f43889ac073acb67c1ddd5d53906943dd24068e5 (patch) | |
| tree | 6be2e736e232e53fc9e01be299dd9d16e5398d94 | |
| parent | 5a846b7a38cf74f2969706dfeadad61f6bebf9e1 (diff) | |
| download | ghdl-f43889ac073acb67c1ddd5d53906943dd24068e5.tar.gz ghdl-f43889ac073acb67c1ddd5d53906943dd24068e5.tar.bz2 ghdl-f43889ac073acb67c1ddd5d53906943dd24068e5.zip | |
synth: slightly improve output for indexes.
| -rw-r--r-- | src/synth/synth-expr.adb | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/src/synth/synth-expr.adb b/src/synth/synth-expr.adb index 8f7665ace..b1e88ea3c 100644 --- a/src/synth/synth-expr.adb +++ b/src/synth/synth-expr.adb @@ -1162,13 +1162,17 @@ package body Synth.Expr is Off : Net; Right : Net; begin - -- TODO: handle width. + Idx2 := Synth_Resize (Idx_Val, Bnd.Wbounds, Loc); + + if Bnd.Right = 0 and then Bnd.Dir = Iir_Downto then + -- Simple case without adjustments. + return Idx2; + end if; + Right := Build_Const_UB32 (Build_Context, To_Uns32 (Bnd.Right), Bnd.Wbounds); Set_Location (Right, Loc); - Idx2 := Synth_Resize (Idx_Val, Bnd.Wbounds, Loc); - case Bnd.Dir is when Iir_To => -- L <= I <= R --> off = R - I |