Changed List to Iterable. Parse instantiations. Some SimpleName fixes.

3 files changed, 232 insertions, 17 deletions

diff --git a/pyGHDL/dom/Concurrent.py b/pyGHDL/dom/Concurrent.py
new file mode 100644
index 000000000..80417c07b
--- /dev/null
+++ b/pyGHDL/dom/Concurrent.py
@@ -0,0 +1,118 @@
+# =============================================================================
+#               ____ _   _ ____  _          _
+#  _ __  _   _ / ___| | | |  _ \| |      __| | ___  _ __ ___
+# | '_ \| | | | |  _| |_| | | | | |     / _` |/ _ \| '_ ` _ \
+# | |_) | |_| | |_| |  _  | |_| | |___ | (_| | (_) | | | | | |
+# | .__/ \__, |\____|_| |_|____/|_____(_)__,_|\___/|_| |_| |_|
+# |_|    |___/
+# =============================================================================
+# Authors:
+#   Patrick Lehmann
+#
+# Package module:   DOM: Concurrent statements.
+#
+# License:
+# ============================================================================
+#  Copyright (C) 2019-2021 Tristan Gingold
+#
+#  This program is free software: you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation, either version 2 of the License, or
+#  (at your option) any later version.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program.  If not, see <gnu.org/licenses>.
+#
+# SPDX-License-Identifier: GPL-2.0-or-later
+# ============================================================================
+from typing import Iterable
+
+from pydecor import export
+
+from pyVHDLModel.SyntaxModel import (
+    ConcurrentBlockStatement as VHDLModel_ConcurrentBlockStatement,
+    ComponentInstantiation as VHDLModel_ComponentInstantiation,
+    EntityInstantiation as VHDLModel_EntityInstantiation,
+    ConfigurationInstantiation as VHDLModel_ConfigurationInstantiation,
+    PortInterfaceItem,
+    ConcurrentStatement,
+)
+
+from pyGHDL.libghdl import Iir
+from pyGHDL.libghdl.vhdl import nodes
+from pyGHDL.dom import DOMMixin
+from pyGHDL.dom.Symbol import EntitySymbol
+
+
+@export
+class ComponentInstantiation(VHDLModel_ComponentInstantiation, DOMMixin):
+    def __init__(self, node: Iir, componentName: str):
+        super().__init__(componentName)
+        DOMMixin.__init__(self, node)
+
+    @classmethod
+    def parse(cls, instantiationNode: Iir) -> "ComponentInstantiation":
+        componentName = ""
+
+        return cls(instantiationNode, componentName)
+
+
+@export
+class EntityInstantiation(VHDLModel_EntityInstantiation, DOMMixin):
+    def __init__(self, node: Iir, entityName: EntitySymbol):
+        super().__init__(entityName)
+        DOMMixin.__init__(self, node)
+
+    @classmethod
+    def parse(cls, instantiationNode: Iir) -> "EntityInstantiation":
+        entityName = ""
+
+        return cls(instantiationNode, entityName)
+
+
+@export
+class ConfigurationInstantiation(VHDLModel_ConfigurationInstantiation, DOMMixin):
+    def __init__(self, node: Iir, configurationName: str):
+        super().__init__(configurationName)
+        DOMMixin.__init__(self, node)
+
+    @classmethod
+    def parse(cls, instantiationNode: Iir) -> "ConfigurationInstantiation":
+        configurationName = ""
+
+        return cls(instantiationNode, configurationName)
+
+
+@export
+class ConcurrentBlockStatement(VHDLModel_ConcurrentBlockStatement, DOMMixin):
+    def __init__(
+        self,
+        node: Iir,
+        label: str,
+        #        portItems: Iterable[PortInterfaceItem] = None,
+        declaredItems: Iterable = None,
+        bodyItems: Iterable["ConcurrentStatement"] = None,
+    ):
+        super().__init__(label, None, declaredItems, bodyItems)
+        DOMMixin.__init__(self, node)
+
+    @classmethod
+    def parse(cls, blockNode: Iir, label: str) -> "ConcurrentBlockStatement":
+        from pyGHDL.dom._Translate import (
+            GetDeclaredItemsFromChainedNodes,
+            GetStatementsFromChainedNodes,
+        )
+
+        declaredItems = GetDeclaredItemsFromChainedNodes(
+            nodes.Get_Declaration_Chain(blockNode), "block", label
+        )
+        bodyItems = GetStatementsFromChainedNodes(
+            nodes.Get_Concurrent_Statement_Chain(blockNode), "block", label
+        )
+
+        return cls(blockNode, label, declaredItems, bodyItems)
diff --git a/pyGHDL/dom/DesignUnit.py b/pyGHDL/dom/DesignUnit.py
index 13e197075..d8e816635 100644
--- a/pyGHDL/dom/DesignUnit.py
+++ b/pyGHDL/dom/DesignUnit.py
@@ -39,7 +39,7 @@ This module contains all DOM classes for VHDL's design units (:class:`context <E
 
 
 """
-from typing import List
+from typing import Iterable
 
 from pydecor import export
 
@@ -68,7 +68,9 @@ from pyGHDL.dom._Translate import (
     GetGenericsFromChainedNodes,
     GetPortsFromChainedNodes,
     GetDeclaredItemsFromChainedNodes,
+    GetStatementsFromChainedNodes,
 )
+from pyGHDL.dom.Names import SimpleName
 from pyGHDL.dom.Symbol import EntitySymbol
 
 
@@ -77,7 +79,7 @@ __all__ = []
 
 @export
 class UseClause(VHDLModel_UseClause, DOMMixin):
-    def __init__(self, node: Iir, name: str):
+    def __init__(self, node: Iir, name: Name):
         super().__init__(name)
         DOMMixin.__init__(self, node)
 
@@ -97,10 +99,10 @@ class Entity(VHDLModel_Entity, DOMMixin):
         self,
         node: Iir,
         identifier: str,
-        genericItems: List[GenericInterfaceItem] = None,
-        portItems: List[PortInterfaceItem] = None,
-        declaredItems: List = None,
-        bodyItems: List["ConcurrentStatement"] = None,
+        genericItems: Iterable[GenericInterfaceItem] = None,
+        portItems: Iterable[PortInterfaceItem] = None,
+        declaredItems: Iterable = None,
+        bodyItems: Iterable["ConcurrentStatement"] = None,
     ):
         super().__init__(identifier, genericItems, portItems, declaredItems, bodyItems)
         DOMMixin.__init__(self, node)
@@ -113,7 +115,9 @@ class Entity(VHDLModel_Entity, DOMMixin):
         declaredItems = GetDeclaredItemsFromChainedNodes(
             nodes.Get_Declaration_Chain(entityNode), "entity", name
         )
-        bodyItems = []
+        bodyItems = GetStatementsFromChainedNodes(
+            nodes.Get_Concurrent_Statement_Chain(entityNode), "entity", name
+        )
 
         return cls(entityNode, name, generics, ports, declaredItems, bodyItems)
 
@@ -125,8 +129,8 @@ class Architecture(VHDLModel_Architecture, DOMMixin):
         node: Iir,
         identifier: str,
         entity: EntityOrSymbol,
-        declaredItems: List = None,
-        bodyItems: List["ConcurrentStatement"] = None,
+        declaredItems: Iterable = None,
+        bodyItems: Iterable["ConcurrentStatement"] = None,
     ):
         super().__init__(identifier, entity, declaredItems, bodyItems)
         DOMMixin.__init__(self, node)
@@ -136,11 +140,13 @@ class Architecture(VHDLModel_Architecture, DOMMixin):
         name = GetNameOfNode(architectureNode)
         entityNameNode = nodes.Get_Entity_Name(architectureNode)
         entityName = GetNameOfNode(entityNameNode)
-        entity = EntitySymbol(entityNameNode, entityName)
+        entity = EntitySymbol(entityNameNode, SimpleName(entityNameNode, entityName))
         declaredItems = GetDeclaredItemsFromChainedNodes(
             nodes.Get_Declaration_Chain(architectureNode), "architecture", name
         )
-        bodyItems = []
+        bodyItems = GetStatementsFromChainedNodes(
+            nodes.Get_Concurrent_Statement_Chain(architectureNode), "architecture", name
+        )
 
         return cls(architectureNode, name, entity, declaredItems, bodyItems)
 
@@ -154,8 +160,8 @@ class Component(VHDLModel_Component, DOMMixin):
         self,
         node: Iir,
         identifier: str,
-        genericItems: List[GenericInterfaceItem] = None,
-        portItems: List[PortInterfaceItem] = None,
+        genericItems: Iterable[GenericInterfaceItem] = None,
+        portItems: Iterable[PortInterfaceItem] = None,
     ):
         super().__init__(identifier, genericItems, portItems)
         DOMMixin.__init__(self, node)
@@ -175,8 +181,8 @@ class Package(VHDLModel_Package, DOMMixin):
         self,
         node: Iir,
         identifier: str,
-        genericItems: List[GenericInterfaceItem] = None,
-        declaredItems: List = None,
+        genericItems: Iterable[GenericInterfaceItem] = None,
+        declaredItems: Iterable = None,
     ):
         super().__init__(identifier, genericItems, declaredItems)
         DOMMixin.__init__(self, node)
@@ -206,7 +212,7 @@ class PackageBody(VHDLModel_PackageBody, DOMMixin):
         self,
         node: Iir,
         identifier: str,
-        declaredItems: List = None,
+        declaredItems: Iterable = None,
     ):
         super().__init__(identifier, declaredItems)
         DOMMixin.__init__(self, node)
diff --git a/pyGHDL/dom/_Translate.py b/pyGHDL/dom/_Translate.py
index 916f0c8df..eac5476c9 100644
--- a/pyGHDL/dom/_Translate.py
+++ b/pyGHDL/dom/_Translate.py
@@ -45,9 +45,10 @@ from pyVHDLModel.SyntaxModel import (
     ParameterInterfaceItem,
     ModelEntity,
     Name,
+    ConcurrentStatement,
 )
 
-from pyGHDL.libghdl import utils
+from pyGHDL.libghdl import utils, name_table
 from pyGHDL.libghdl._types import Iir
 from pyGHDL.libghdl.vhdl import nodes
 from pyGHDL.dom import Position, DOMException
@@ -137,6 +138,7 @@ from pyGHDL.dom.Expression import (
     MatchingLessEqualExpression,
     MatchingGreaterThanExpression,
 )
+from pyGHDL.dom.Concurrent import ConcurrentBlockStatement
 from pyGHDL.dom.Subprogram import Function, Procedure
 from pyGHDL.dom.Misc import Alias
 from pyGHDL.dom.PSL import DefaultClock
@@ -743,6 +745,95 @@ def GetDeclaredItemsFromChainedNodes(
         yield obj
 
 
+def GetStatementsFromChainedNodes(
+    nodeChain: Iir, entity: str, name: str
+) -> Generator[ConcurrentStatement, None, None]:
+    for statement in utils.chain_iter(nodeChain):
+        label = nodes.Get_Label(statement)
+        if label != nodes.Null_Iir:
+            label = name_table.Get_Name_Ptr(label)
+
+        pos = Position.parse(statement)
+
+        kind = GetIirKindOfNode(statement)
+        if kind == nodes.Iir_Kind.Sensitized_Process_Statement:
+            print(
+                "[NOT IMPLEMENTED] Process (label: '{label}') with sensitivity list at line {line}".format(
+                    label=label, line=pos.Line
+                )
+            )
+        elif kind == nodes.Iir_Kind.Concurrent_Simple_Signal_Assignment:
+            print(
+                "[NOT IMPLEMENTED] Concurrent (simple) signal assignment (label: '{label}') at line {line}".format(
+                    label=label, line=pos.Line
+                )
+            )
+        elif kind == nodes.Iir_Kind.Component_Instantiation_Statement:
+            instantiatedUnit = nodes.Get_Instantiated_Unit(statement)
+            instantiatedUnitKind = GetIirKindOfNode(instantiatedUnit)
+            if instantiatedUnitKind == nodes.Iir_Kind.Entity_Aspect_Entity:
+                entityId = nodes.Get_Entity_Name(instantiatedUnit)
+                entityName = GetNameFromNode(entityId)
+
+                architectureName = ""
+                architectureId = nodes.Get_Architecture(instantiatedUnit)
+                if architectureId != nodes.Null_Iir:
+                    architectureName = GetNameOfNode(architectureId)
+
+                print(
+                    "Instance of '{component!s}({architecture})' with label '{label}' at line {line}".format(
+                        component=entityName,
+                        architecture=architectureName,
+                        label=label,
+                        line=pos.Line,
+                    )
+                )
+            elif instantiatedUnitKind == nodes.Iir_Kind.Entity_Aspect_Configuration:
+                configurationId = nodes.Get_Configuration_Name(instantiatedUnit)
+                configurationName = GetNameFromNode(configurationId)
+
+                print(
+                    "Instance of '{configuration}' with label '{label}' at line {line}".format(
+                        configuration=configurationName, label=label, line=pos.Line
+                    )
+                )
+            elif instantiatedUnitKind in (
+                nodes.Iir_Kind.Simple_Name,
+                nodes.Iir_Kind.Parenthesis_Name,
+            ):
+                componentName = GetNameFromNode(instantiatedUnit)
+
+                print(
+                    "Component '{component}' instantiated with label '{label}' at line {line}".format(
+                        component=componentName, label=label, line=pos.Line
+                    )
+                )
+            else:
+                raise DOMException(
+                    "Unknown instantiation kind '{kind}' in instantiation of label {label} at {file}:{line}:{column}.".format(
+                        kind=instantiatedUnitKind.name,
+                        label=label,
+                        file=pos.Filename,
+                        line=pos.Line,
+                        column=pos.Column,
+                    )
+                )
+
+        elif kind == nodes.Iir_Kind.Block_Statement:
+            yield ConcurrentBlockStatement.parse(statement, label)
+        else:
+            raise DOMException(
+                "Unknown statement of kind '{kind}' in {entity} '{name}' at {file}:{line}:{column}.".format(
+                    kind=kind.name,
+                    entity=entity,
+                    name=name,
+                    file=pos.Filename,
+                    line=pos.Line,
+                    column=pos.Column,
+                )
+            )
+
+
 def GetAliasFromNode(aliasNode: Iir):
     aliasName = GetNameOfNode(aliasNode)