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| author | Tristan Gingold <tgingold@free.fr> | 2019-09-30 20:32:13 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-09-30 20:32:13 +0200 |
| commit | d469d3bfe180707927a04a8d1e69a1276c88bb7c (patch) | |
| tree | 7ad538cb5ea031dbd1f34ecf2b9d86d5db586b48 | |
| parent | d6dfa7a2b0742b411bb992fc143e7ada382498b0 (diff) | |
| download | ghdl-d469d3bfe180707927a04a8d1e69a1276c88bb7c.tar.gz ghdl-d469d3bfe180707927a04a8d1e69a1276c88bb7c.tar.bz2 ghdl-d469d3bfe180707927a04a8d1e69a1276c88bb7c.zip | |
synth-oper: implement >= and <= for uns/nat. Fix #952
| -rw-r--r-- | src/synth/synth-oper.adb | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/synth/synth-oper.adb b/src/synth/synth-oper.adb index b9926aff0..ddb4b2e88 100644 --- a/src/synth/synth-oper.adb +++ b/src/synth/synth-oper.adb @@ -512,6 +512,9 @@ package body Synth.Oper is | Iir_Predefined_Ieee_Std_Logic_Unsigned_Le_Slv_Slv => -- "<=" (Unsigned, Unsigned) [resize] return Synth_Compare_Uns_Uns (Id_Ule); + when Iir_Predefined_Ieee_Numeric_Std_Le_Uns_Nat => + -- "<=" (Unsigned, Natural) + return Synth_Compare_Uns_Nat (Id_Ule); when Iir_Predefined_Ieee_Numeric_Std_Gt_Uns_Nat => -- ">" (Unsigned, Natural) @@ -528,6 +531,9 @@ package body Synth.Oper is | Iir_Predefined_Ieee_Std_Logic_Unsigned_Ge_Slv_Slv => -- ">=" (Unsigned, Unsigned) [resize] return Synth_Compare_Uns_Uns (Id_Uge); + when Iir_Predefined_Ieee_Numeric_Std_Ge_Uns_Nat => + -- ">=" (Unsigned, Natural) + return Synth_Compare_Uns_Nat (Id_Uge); when Iir_Predefined_Array_Element_Concat => declare |