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| author | Tristan Gingold <tgingold@free.fr> | 2020-03-09 18:20:21 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2020-03-09 18:20:21 +0100 |
| commit | d39b3167068585948b8aab12a1cc02023b1eaf6b (patch) | |
| tree | 4ab79be7a6512508ef28aee94c005a97fe6b404f | |
| parent | dd4003d099f2acb8510ded0a71ea668372f58f2f (diff) | |
| download | ghdl-d39b3167068585948b8aab12a1cc02023b1eaf6b.tar.gz ghdl-d39b3167068585948b8aab12a1cc02023b1eaf6b.tar.bz2 ghdl-d39b3167068585948b8aab12a1cc02023b1eaf6b.zip | |
synth-stmts: do not limit to 32 state bits for PSL
| -rw-r--r-- | src/synth/synth-stmts.adb | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/synth/synth-stmts.adb b/src/synth/synth-stmts.adb index f230b7cfb..a5557cd94 100644 --- a/src/synth/synth-stmts.adb +++ b/src/synth/synth-stmts.adb @@ -2773,7 +2773,6 @@ package body Synth.Stmts is Clk_Inst : Instance; begin -- create init net, clock net - pragma Assert (Nbr_States <= 32); Init := Build_Const_UB32 (Build_Context, 1, Uns32 (Nbr_States)); Clk := Synth_PSL_Expression (Syn_Inst, Get_PSL_Clock (Stmt)); |