pyunit/lsp: adjust tests

12 files changed, 64 insertions, 152 deletions

diff --git a/testsuite/pyunit/lsp/002coverage/cmds.json b/testsuite/pyunit/lsp/002coverage/cmds.json
index 132cabcda..d003972a3 100644
--- a/testsuite/pyunit/lsp/002coverage/cmds.json
+++ b/testsuite/pyunit/lsp/002coverage/cmds.json
@@ -5,8 +5,8 @@
     "method": "initialize",
     "params": {
       "processId": 11082,
-      "rootPath": "/home/tgingold/work/vhdl-language-server/tests/002coverage",
-      "rootUri": "file:///home/tgingold/work/vhdl-language-server/tests/002coverage",
+      "rootPath": "002coverage",
+      "rootUri": "file://002coverage",
       "capabilities": {
         "workspace": {
           "applyEdit": true,
@@ -203,7 +203,7 @@
       "trace": "off",
       "workspaceFolders": [
         {
-          "uri": "file:///home/tgingold/work/vhdl-language-server/tests/002coverage",
+          "uri": "file://002coverage",
           "name": "002coverage"
         }
       ]
@@ -219,7 +219,7 @@
     "method": "textDocument/didOpen",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+        "uri": "file://files/adder.vhdl",
         "languageId": "vhdl",
         "version": 1,
         "text": "\nentity adder is\n  -- `i0`, `i1`, and the carry-in `ci` are inputs of the adder.\n  -- `s` is the sum output, `co` is the carry-out.\n  port (i0, i1 : in bit; ci : in bit; s : out bit; co : out bit);\nend adder;\n\narchitecture rtl of adder is\nbegin\n  --  This full-adder architecture contains two concurrent assignments.\n  --  Compute the sum.\n  s <= i0 xor i1 xor ci;\n  --  Compute the carry.\n  co <= (i0 and i1) or (i0 and ci) or (i1 and ci);\nend rtl;\n\n"
@@ -232,7 +232,7 @@
     "method": "textDocument/documentSymbol",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl"
+        "uri": "file://files/adder.vhdl"
       }
     }
   },
@@ -241,7 +241,7 @@
     "method": "textDocument/didOpen",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder_tb.vhdl",
+        "uri": "file://files/adder_tb.vhdl",
         "languageId": "vhdl",
         "version": 1,
         "text": "\n--  A testbench has no ports.\nentity adder_tb is\nend adder_tb;\n\narchitecture behav of adder_tb is\n  --  Declaration of the component that will be instantiated.\n  component adder\n    port (i0, i1 : in bit; ci : in bit; s : out bit; co : out bit);\n  end component;\n\n  --  Specifies which entity is bound with the component.\n  for adder_0: adder use entity work.adder;\n  signal i0, i1, ci, s, co : bit;\nbegin\n  --  Component instantiation.\n  adder_0: adder port map (i0 => i0, i1 => i1, ci => ci,\n                           s => s, co => co);\n\n  --  This process does the real job.\n  process\n    type pattern_type is record\n      --  The inputs of the adder.\n      i0, i1, ci : bit;\n      --  The expected outputs of the adder.\n      s, co : bit;\n    end record;\n    --  The patterns to apply.\n    type pattern_array is array (natural range <>) of pattern_type;\n    constant patterns : pattern_array :=\n      (('0', '0', '0', '0', '0'),\n       ('0', '0', '1', '1', '0'),\n       ('0', '1', '0', '1', '0'),\n       ('0', '1', '1', '0', '1'),\n       ('1', '0', '0', '1', '0'),\n       ('1', '0', '1', '0', '1'),\n       ('1', '1', '0', '0', '1'),\n       ('1', '1', '1', '1', '1'));\n  begin\n    --  Check each pattern.\n    for i in patterns'range loop\n      --  Set the inputs.\n      i0 <= patterns(i).i0;\n      i1 <= patterns(i).i1;\n      ci <= patterns(i).ci;\n      --  Wait for the results.\n      wait for 1 ns;\n      --  Check the outputs.\n      assert s = patterns(i).s\n        report \"bad sum value\" severity error;\n      assert co = patterns(i).co\n        report \"bad carry out value\" severity error;\n    end loop;\n    assert false report \"end of test\" severity note;\n    --  Wait forever; this will finish the simulation.\n    wait;\n  end process;\nend behav;\n\n\n"
@@ -254,7 +254,7 @@
     "method": "textDocument/documentSymbol",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder_tb.vhdl"
+        "uri": "file://files/adder_tb.vhdl"
       }
     }
   },
@@ -264,7 +264,7 @@
     "method": "textDocument/definition",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder_tb.vhdl"
+        "uri": "file://files/adder_tb.vhdl"
       },
       "position": {
         "line": 12,
@@ -277,7 +277,7 @@
     "method": "textDocument/didChange",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+        "uri": "file://files/adder.vhdl",
         "version": 2
       },
       "contentChanges": [
@@ -304,7 +304,7 @@
     "method": "textDocument/documentSymbol",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl"
+        "uri": "file://files/adder.vhdl"
       }
     }
   },
@@ -313,7 +313,7 @@
     "method": "textDocument/didChange",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+        "uri": "file://files/adder.vhdl",
         "version": 3
       },
       "contentChanges": [
@@ -340,7 +340,7 @@
     "method": "textDocument/documentSymbol",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl"
+        "uri": "file://files/adder.vhdl"
       }
     }
   },
@@ -349,7 +349,7 @@
     "method": "textDocument/didChange",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+        "uri": "file://files/adder.vhdl",
         "version": 4
       },
       "contentChanges": [
@@ -375,7 +375,7 @@
     "method": "textDocument/didChange",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+        "uri": "file://files/adder.vhdl",
         "version": 5
       },
       "contentChanges": [
@@ -402,7 +402,7 @@
     "method": "textDocument/documentSymbol",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl"
+        "uri": "file://files/adder.vhdl"
       }
     }
   },
@@ -411,7 +411,7 @@
     "method": "textDocument/didChange",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+        "uri": "file://files/adder.vhdl",
         "version": 6
       },
       "contentChanges": [
@@ -438,7 +438,7 @@
     "method": "textDocument/documentSymbol",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl"
+        "uri": "file://files/adder.vhdl"
       }
     }
   },
@@ -447,7 +447,7 @@
     "method": "textDocument/didChange",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+        "uri": "file://files/adder.vhdl",
         "version": 7
       },
       "contentChanges": [
diff --git a/testsuite/pyunit/lsp/002coverage/cmds.lsp b/testsuite/pyunit/lsp/002coverage/cmds.lsp
deleted file mode 100644
index 5d9745df3..000000000
--- a/testsuite/pyunit/lsp/002coverage/cmds.lsp
+++ /dev/null
@@ -1,35 +0,0 @@
-Content-Length: 2167
-
-{"jsonrpc":"2.0","id":0,"method":"initialize","params":{"processId":11082,"rootPath":"/home/tgingold/work/vhdl-language-server/tests/002coverage","rootUri":"file:///home/tgingold/work/vhdl-language-server/tests/002coverage","capabilities":{"workspace":{"applyEdit":true,"workspaceEdit":{"documentChanges":true},"didChangeConfiguration":{"dynamicRegistration":true},"didChangeWatchedFiles":{"dynamicRegistration":true},"symbol":{"dynamicRegistration":true,"symbolKind":{"valueSet":[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26]}},"executeCommand":{"dynamicRegistration":true},"configuration":true,"workspaceFolders":true},"textDocument":{"publishDiagnostics":{"relatedInformation":true},"synchronization":{"dynamicRegistration":true,"willSave":true,"willSaveWaitUntil":true,"didSave":true},"completion":{"dynamicRegistration":true,"contextSupport":true,"completionItem":{"snippetSupport":true,"commitCharactersSupport":true,"documentationFormat":["markdown","plaintext"],"deprecatedSupport":true},"completionItemKind":{"valueSet":[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25]}},"hover":{"dynamicRegistration":true,"contentFormat":["markdown","plaintext"]},"signatureHelp":{"dynamicRegistration":true,"signatureInformation":{"documentationFormat":["markdown","plaintext"]}},"definition":{"dynamicRegistration":true},"references":{"dynamicRegistration":true},"documentHighlight":{"dynamicRegistration":true},"documentSymbol":{"dynamicRegistration":true,"symbolKind":{"valueSet":[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26]}},"codeAction":{"dynamicRegistration":true},"codeLens":{"dynamicRegistration":true},"formatting":{"dynamicRegistration":true},"rangeFormatting":{"dynamicRegistration":true},"onTypeFormatting":{"dynamicRegistration":true},"rename":{"dynamicRegistration":true},"documentLink":{"dynamicRegistration":true},"typeDefinition":{"dynamicRegistration":true},"implementation":{"dynamicRegistration":true},"colorProvider":{"dynamicRegistration":true}}},"trace":"off","workspaceFolders":[{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/002coverage","name":"002coverage"}]}}Content-Length: 52
-
-{"jsonrpc":"2.0","method":"initialized","params":{}}Content-Length: 665
-
-{"jsonrpc":"2.0","method":"textDocument/didOpen","params":{"textDocument":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","languageId":"vhdl","version":1,"text":"\nentity adder is\n  -- `i0`, `i1`, and the carry-in `ci` are inputs of the adder.\n  -- `s` is the sum output, `co` is the carry-out.\n  port (i0, i1 : in bit; ci : in bit; s : out bit; co : out bit);\nend adder;\n\narchitecture rtl of adder is\nbegin\n  --  This full-adder architecture contains two concurrent assignments.\n  --  Compute the sum.\n  s <= i0 xor i1 xor ci;\n  --  Compute the carry.\n  co <= (i0 and i1) or (i0 and ci) or (i1 and ci);\nend rtl;\n\n"}}}Content-Length: 170
-
-{"jsonrpc":"2.0","id":1,"method":"textDocument/documentSymbol","params":{"textDocument":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl"}}}Content-Length: 2026
-
-{"jsonrpc":"2.0","method":"textDocument/didOpen","params":{"textDocument":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder_tb.vhdl","languageId":"vhdl","version":1,"text":"\n--  A testbench has no ports.\nentity adder_tb is\nend adder_tb;\n\narchitecture behav of adder_tb is\n  --  Declaration of the component that will be instantiated.\n  component adder\n    port (i0, i1 : in bit; ci : in bit; s : out bit; co : out bit);\n  end component;\n\n  --  Specifies which entity is bound with the component.\n  for adder_0: adder use entity work.adder;\n  signal i0, i1, ci, s, co : bit;\nbegin\n  --  Component instantiation.\n  adder_0: adder port map (i0 => i0, i1 => i1, ci => ci,\n                           s => s, co => co);\n\n  --  This process does the real job.\n  process\n    type pattern_type is record\n      --  The inputs of the adder.\n      i0, i1, ci : bit;\n      --  The expected outputs of the adder.\n      s, co : bit;\n    end record;\n    --  The patterns to apply.\n    type pattern_array is array (natural range <>) of pattern_type;\n    constant patterns : pattern_array :=\n      (('0', '0', '0', '0', '0'),\n       ('0', '0', '1', '1', '0'),\n       ('0', '1', '0', '1', '0'),\n       ('0', '1', '1', '0', '1'),\n       ('1', '0', '0', '1', '0'),\n       ('1', '0', '1', '0', '1'),\n       ('1', '1', '0', '0', '1'),\n       ('1', '1', '1', '1', '1'));\n  begin\n    --  Check each pattern.\n    for i in patterns'range loop\n      --  Set the inputs.\n      i0 <= patterns(i).i0;\n      i1 <= patterns(i).i1;\n      ci <= patterns(i).ci;\n      --  Wait for the results.\n      wait for 1 ns;\n      --  Check the outputs.\n      assert s = patterns(i).s\n        report \"bad sum value\" severity error;\n      assert co = patterns(i).co\n        report \"bad carry out value\" severity error;\n    end loop;\n    assert false report \"end of test\" severity note;\n    --  Wait forever; this will finish the simulation.\n    wait;\n  end process;\nend behav;\n\n\n"}}}Content-Length: 173
-
-{"jsonrpc":"2.0","id":2,"method":"textDocument/documentSymbol","params":{"textDocument":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder_tb.vhdl"}}}Content-Length: 207
-
-{"jsonrpc":"2.0","id":3,"method":"textDocument/definition","params":{"textDocument":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder_tb.vhdl"},"position":{"line":12,"character":39}}}Content-Length: 299
-
-{"jsonrpc":"2.0","method":"textDocument/didChange","params":{"textDocument":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","version":2},"contentChanges":[{"range":{"start":{"line":11,"character":24},"end":{"line":11,"character":24}},"rangeLength":0,"text":"\n  "}]}}Content-Length: 170
-
-{"jsonrpc":"2.0","id":4,"method":"textDocument/documentSymbol","params":{"textDocument":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl"}}}Content-Length: 294
-
-{"jsonrpc":"2.0","method":"textDocument/didChange","params":{"textDocument":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","version":3},"contentChanges":[{"range":{"start":{"line":12,"character":2},"end":{"line":12,"character":2}},"rangeLength":0,"text":"e"}]}}Content-Length: 170
-
-{"jsonrpc":"2.0","id":5,"method":"textDocument/documentSymbol","params":{"textDocument":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl"}}}Content-Length: 294
-
-{"jsonrpc":"2.0","method":"textDocument/didChange","params":{"textDocument":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","version":4},"contentChanges":[{"range":{"start":{"line":12,"character":3},"end":{"line":12,"character":3}},"rangeLength":0,"text":"r"}]}}Content-Length: 294
-
-{"jsonrpc":"2.0","method":"textDocument/didChange","params":{"textDocument":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","version":5},"contentChanges":[{"range":{"start":{"line":12,"character":4},"end":{"line":12,"character":4}},"rangeLength":0,"text":"r"}]}}Content-Length: 170
-
-{"jsonrpc":"2.0","id":6,"method":"textDocument/documentSymbol","params":{"textDocument":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl"}}}Content-Length: 294
-
-{"jsonrpc":"2.0","method":"textDocument/didChange","params":{"textDocument":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","version":6},"contentChanges":[{"range":{"start":{"line":12,"character":5},"end":{"line":12,"character":5}},"rangeLength":0,"text":";"}]}}Content-Length: 170
-
-{"jsonrpc":"2.0","id":7,"method":"textDocument/documentSymbol","params":{"textDocument":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl"}}}Content-Length: 293
-
-{"jsonrpc":"2.0","method":"textDocument/didChange","params":{"textDocument":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","version":7},"contentChanges":[{"range":{"start":{"line":12,"character":2},"end":{"line":13,"character":2}},"rangeLength":7,"text":""}]}}
\ No newline at end of file
diff --git a/testsuite/pyunit/lsp/002coverage/replies.json b/testsuite/pyunit/lsp/002coverage/replies.json
index f573052cb..ff269dd6e 100644
--- a/testsuite/pyunit/lsp/002coverage/replies.json
+++ b/testsuite/pyunit/lsp/002coverage/replies.json
@@ -27,7 +27,7 @@
     "jsonrpc": "2.0",
     "method": "textDocument/publishDiagnostics",
     "params": {
-      "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+      "uri": "file://files/adder.vhdl",
       "diagnostics": []
     }
   },
@@ -39,7 +39,7 @@
         "kind": 2,
         "name": "adder",
         "location": {
-          "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+          "uri": "file://files/adder.vhdl",
           "range": {
             "start": {
               "line": 1,
@@ -56,7 +56,7 @@
         "kind": 2,
         "name": "rtl",
         "location": {
-          "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+          "uri": "file://files/adder.vhdl",
           "range": {
             "start": {
               "line": 7,
@@ -75,7 +75,7 @@
     "jsonrpc": "2.0",
     "method": "textDocument/publishDiagnostics",
     "params": {
-      "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder_tb.vhdl",
+      "uri": "file://files/adder_tb.vhdl",
       "diagnostics": []
     }
   },
@@ -87,7 +87,7 @@
         "kind": 2,
         "name": "adder_tb",
         "location": {
-          "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder_tb.vhdl",
+          "uri": "file://files/adder_tb.vhdl",
           "range": {
             "start": {
               "line": 2,
@@ -104,7 +104,7 @@
         "kind": 2,
         "name": "behav",
         "location": {
-          "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder_tb.vhdl",
+          "uri": "file://files/adder_tb.vhdl",
           "range": {
             "start": {
               "line": 5,
@@ -121,7 +121,7 @@
         "kind": 6,
         "name": "adder_0",
         "location": {
-          "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder_tb.vhdl",
+          "uri": "file://files/adder_tb.vhdl",
           "range": {
             "start": {
               "line": 16,
@@ -137,7 +137,7 @@
           "kind": 2,
           "name": "behav",
           "location": {
-            "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder_tb.vhdl",
+            "uri": "file://files/adder_tb.vhdl",
             "range": {
               "start": {
                 "line": 5,
@@ -158,7 +158,7 @@
     "id": 3,
     "result": [
       {
-        "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+        "uri": "file://files/adder.vhdl",
         "range": {
           "start": {
             "line": 1,
@@ -176,7 +176,7 @@
     "jsonrpc": "2.0",
     "method": "textDocument/publishDiagnostics",
     "params": {
-      "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+      "uri": "file://files/adder.vhdl",
       "diagnostics": []
     }
   },
@@ -188,7 +188,7 @@
         "kind": 2,
         "name": "adder",
         "location": {
-          "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+          "uri": "file://files/adder.vhdl",
           "range": {
             "start": {
               "line": 1,
@@ -205,7 +205,7 @@
         "kind": 2,
         "name": "rtl",
         "location": {
-          "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+          "uri": "file://files/adder.vhdl",
           "range": {
             "start": {
               "line": 7,
@@ -224,7 +224,7 @@
     "jsonrpc": "2.0",
     "method": "textDocument/publishDiagnostics",
     "params": {
-      "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+      "uri": "file://files/adder.vhdl",
       "diagnostics": [
         {
           "source": "ghdl",
@@ -312,7 +312,7 @@
         "kind": 2,
         "name": "adder",
         "location": {
-          "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+          "uri": "file://files/adder.vhdl",
           "range": {
             "start": {
               "line": 1,
@@ -329,7 +329,7 @@
         "kind": 2,
         "name": "rtl",
         "location": {
-          "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+          "uri": "file://files/adder.vhdl",
           "range": {
             "start": {
               "line": 7,
@@ -348,7 +348,7 @@
     "jsonrpc": "2.0",
     "method": "textDocument/publishDiagnostics",
     "params": {
-      "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+      "uri": "file://files/adder.vhdl",
       "diagnostics": [
         {
           "source": "ghdl",
@@ -432,7 +432,7 @@
     "jsonrpc": "2.0",
     "method": "textDocument/publishDiagnostics",
     "params": {
-      "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+      "uri": "file://files/adder.vhdl",
       "diagnostics": [
         {
           "source": "ghdl",
@@ -520,7 +520,7 @@
         "kind": 2,
         "name": "adder",
         "location": {
-          "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+          "uri": "file://files/adder.vhdl",
           "range": {
             "start": {
               "line": 1,
@@ -537,7 +537,7 @@
         "kind": 2,
         "name": "rtl",
         "location": {
-          "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+          "uri": "file://files/adder.vhdl",
           "range": {
             "start": {
               "line": 7,
@@ -556,7 +556,7 @@
     "jsonrpc": "2.0",
     "method": "textDocument/publishDiagnostics",
     "params": {
-      "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+      "uri": "file://files/adder.vhdl",
       "diagnostics": [
         {
           "source": "ghdl",
@@ -584,7 +584,7 @@
         "kind": 2,
         "name": "adder",
         "location": {
-          "uri": "file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl",
+          "uri": "file://files/adder.vhdl",
           "range": {
             "start": {
               "line": 1,
@@ -601,7 +601,7 @@
         "kind": 2,
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-
-{"jsonrpc":"2.0","method":"textDocument/didOpen","params":{"textDocument":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","languageId":"vhdl","version":1,"text":"\nentity adder is\n  -- `i0`, `i1`, and the carry-in `ci` are inputs of the adder.\n  -- `s` is the sum output, `co` is the carry-out.\n  port (i0, i1 : in bit; ci : in bit; s : out bit; co : out bit);\nend adder;\n\narchitecture rtl of adder is\nbegin\n  --  This full-adder architecture contains two concurrent assignments.\n  --  Compute the sum.\n  s <= i0 xor i1 xor ci;\n  --  Compute the carry.\n  co <= (i0 and i1) or (i0 and ci) or (i1 and ci);\nend rtl;\n\n"}}}Content-Length: 170
-
-{"jsonrpc":"2.0","id":1,"method":"textDocument/documentSymbol","params":{"textDocument":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl"}}}Content-Length: 58
-
-{"jsonrpc":"2.0","id":2,"method":"shutdown","params":null}
\ No newline at end of file
diff --git a/testsuite/pyunit/lsp/002coverage/vhdl-ls.trace.out b/testsuite/pyunit/lsp/002coverage/vhdl-ls.trace.out
deleted file mode 100644
index a31574b10..000000000
--- a/testsuite/pyunit/lsp/002coverage/vhdl-ls.trace.out
+++ /dev/null
@@ -1,9 +0,0 @@
-Content-Length: 393
-
-{"jsonrpc":"2.0","id":0,"result":{"capabilities":{"textDocumentSync":{"openClose":true,"change":2,"save":{"includeText":true}},"hoverProvider":false,"definitionProvider":true,"referencesProvider":false,"documentHighlightProvider":false,"documentSymbolProvider":true,"codeActionProvider":false,"documentFormattingProvider":false,"documentRangeFormattingProvider":false,"renameProvider":false}}}Content-Length: 167
-
-{"jsonrpc":"2.0","method":"textDocument/publishDiagnostics","params":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","diagnostics":[]}}Content-Length: 2423
-
-{"jsonrpc":"2.0","id":1,"result":[{"kind":2,"name":"adder","location":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","range":{"start":{"line":1,"character":7},"end":{"line":1,"character":12}}}},{"kind":13,"name":"i0","location":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","range":{"start":{"line":4,"character":8},"end":{"line":4,"character":10}}},"containerName":{"kind":2,"name":"adder","location":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","range":{"start":{"line":1,"character":7},"end":{"line":1,"character":12}}}}},{"kind":13,"name":"i1","location":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","range":{"start":{"line":4,"character":12},"end":{"line":4,"character":14}}},"containerName":{"kind":2,"name":"adder","location":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","range":{"start":{"line":1,"character":7},"end":{"line":1,"character":12}}}}},{"kind":13,"name":"ci","location":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","range":{"start":{"line":4,"character":25},"end":{"line":4,"character":27}}},"containerName":{"kind":2,"name":"adder","location":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","range":{"start":{"line":1,"character":7},"end":{"line":1,"character":12}}}}},{"kind":13,"name":"s","location":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","range":{"start":{"line":4,"character":38},"end":{"line":4,"character":39}}},"containerName":{"kind":2,"name":"adder","location":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","range":{"start":{"line":1,"character":7},"end":{"line":1,"character":12}}}}},{"kind":13,"name":"co","location":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","range":{"start":{"line":4,"character":51},"end":{"line":4,"character":53}}},"containerName":{"kind":2,"name":"adder","location":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","range":{"start":{"line":1,"character":7},"end":{"line":1,"character":12}}}}},{"kind":2,"name":"rtl","location":{"uri":"file:///home/tgingold/work/vhdl-language-server/tests/files/adder.vhdl","range":{"start":{"line":7,"character":13},"end":{"line":7,"character":16}}}}]}Content-Length: 38
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diff --git a/testsuite/pyunit/lsp/003errors/crash1.json b/testsuite/pyunit/lsp/003errors/crash1.json
index 155770d78..49c43326b 100644
--- a/testsuite/pyunit/lsp/003errors/crash1.json
+++ b/testsuite/pyunit/lsp/003errors/crash1.json
@@ -5,8 +5,8 @@
     "method": "initialize",
     "params": {
       "processId": 27805,
-      "rootPath": "/home/tgingold/work/vhdl-language-server/tests/003errors",
-      "rootUri": "file:///home/tgingold/work/vhdl-language-server/tests/003errors",
+      "rootPath": "003errors",
+      "rootUri": "file://003errors",
       "capabilities": {
         "workspace": {
           "applyEdit": true,
@@ -203,7 +203,7 @@
       "trace": "off",
       "workspaceFolders": [
         {
-          "uri": "file:///home/tgingold/work/vhdl-language-server/tests/003errors",
+          "uri": "file://003errors",
           "name": "003errors"
         }
       ]
@@ -219,7 +219,7 @@
     "method": "textDocument/didOpen",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/vhdl-language-server/tests/003errors/tc.vhdl",
+        "uri": "file://003errors/tc.vhdl",
         "languageId": "vhdl",
         "version": 74,
         "text": "library ieee;\nuse ieee.std_logic_1164.all;\nuse ieee.std_logic_unsigned.all;\n\nentity \n"
diff --git a/testsuite/pyunit/lsp/003errors/crash2.json b/testsuite/pyunit/lsp/003errors/crash2.json
index ab12ed3bf..4891a0207 100644
--- a/testsuite/pyunit/lsp/003errors/crash2.json
+++ b/testsuite/pyunit/lsp/003errors/crash2.json
@@ -5,8 +5,8 @@
     "method": "initialize",
     "params": {
       "processId": 30387,
-      "rootPath": "/home/tgingold/work/vhdl-language-server/tests/003errors",
-      "rootUri": "file:///home/tgingold/work/vhdl-language-server/tests/003errors",
+      "rootPath": "003errors",
+      "rootUri": "file://003errors",
       "capabilities": {
         "workspace": {
           "applyEdit": true,
@@ -203,7 +203,7 @@
       "trace": "off",
       "workspaceFolders": [
         {
-          "uri": "file:///home/tgingold/work/vhdl-language-server/tests/003errors",
+          "uri": "file://003errors",
           "name": "003errors"
         }
       ]
@@ -219,7 +219,7 @@
     "method": "textDocument/didOpen",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/vhdl-language-server/tests/003errors/tc.vhdl",
+        "uri": "file://003errors/tc.vhdl",
         "languageId": "vhdl",
         "version": 172,
         "text": "library ieee;\nuse ieee.std_logic_1164.all;\nuse ieee.std_logic_unsigned.all;\n\nentity tb is\nend tb;\n\narchitecture behav of tb is\n    signal s : std_logic_vector(7 downto 0);\nbegin\n      assert s != x\"73\";\n    end process;\nend behav;        \n"
@@ -232,7 +232,7 @@
     "method": "textDocument/documentSymbol",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/vhdl-language-server/tests/003errors/tc.vhdl"
+        "uri": "file://003errors/tc.vhdl"
       }
     }
   }
diff --git a/testsuite/pyunit/lsp/003errors/replies.json b/testsuite/pyunit/lsp/003errors/replies.json
index 88f962da5..dd52af8cd 100644
--- a/testsuite/pyunit/lsp/003errors/replies.json
+++ b/testsuite/pyunit/lsp/003errors/replies.json
@@ -70,7 +70,7 @@
         "kind": 2,
         "name": "tb",
         "location": {
-          "uri": "file:///home/tgingold/work/vhdl-language-server/tests/003errors/tc.vhdl",
+          "uri": "file://003errors/tc.vhdl",
           "range": {
             "start": {
               "line": 4,
@@ -87,7 +87,7 @@
         "kind": 2,
         "name": "behav",
         "location": {
-          "uri": "file:///home/tgingold/work/vhdl-language-server/tests/003errors/tc.vhdl",
+          "uri": "file://003errors/tc.vhdl",
           "range": {
             "start": {
               "line": 7,
diff --git a/testsuite/pyunit/lsp/005opterr/cmds.json b/testsuite/pyunit/lsp/005opterr/cmds.json
index 79fd0207d..1d95b1da4 100644
--- a/testsuite/pyunit/lsp/005opterr/cmds.json
+++ b/testsuite/pyunit/lsp/005opterr/cmds.json
@@ -5,8 +5,8 @@
     "method": "initialize",
     "params": {
       "processId": 14698,
-      "rootPath": "/home/tgingold/work/ghdl-language-server/ghdl-ls/tests/005opterr",
-      "rootUri": "file:///home/tgingold/work/ghdl-language-server/ghdl-ls/tests/005opterr",
+	"rootPath": ".",
+	"rootUri": "file://.",
       "capabilities": {
         "workspace": {
           "applyEdit": true,
@@ -224,7 +224,7 @@
       "trace": "off",
       "workspaceFolders": [
         {
-          "uri": "file:///home/tgingold/work/ghdl-language-server/ghdl-ls/tests/005opterr",
+          "uri": "file://005opterr",
           "name": "005opterr"
         }
       ]
@@ -240,7 +240,7 @@
     "method": "textDocument/didOpen",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/ghdl-language-server/ghdl-ls/tests/files/heartbeat.vhdl",
+        "uri": "file://files/heartbeat.vhdl",
         "languageId": "vhdl",
         "version": 1,
         "text": "\nlibrary ieee;\nuse ieee.std_logic_1164.all;\n\nentity heartbeat is\n  port ( clk: out std_logic);\nend heartbeat;\n\narchitecture behaviour of heartbeat\nis\n  constant clk_period : time := 10 ns;\nbegin\n  -- Clock process definition\n  clk_process: process\n  begin\n    clk <= '0';\n    wait for clk_period/2;\n    clk <= '1';\n    wait for clk_period/2;\n  end process;\nend behaviour;\n\n"
@@ -253,7 +253,7 @@
     "method": "textDocument/documentSymbol",
     "params": {
       "textDocument": {
-        "uri": "file:///home/tgingold/work/ghdl-language-server/ghdl-ls/tests/files/heartbeat.vhdl"
+        "uri": "file://files/heartbeat.vhdl"
       }
     }
   }
diff --git a/testsuite/pyunit/lsp/005opterr/replies.json b/testsuite/pyunit/lsp/005opterr/replies.json
index e21affc07..e32ae2017 100644
--- a/testsuite/pyunit/lsp/005opterr/replies.json
+++ b/testsuite/pyunit/lsp/005opterr/replies.json
@@ -35,7 +35,7 @@
     "jsonrpc": "2.0",
     "method": "textDocument/publishDiagnostics",
     "params": {
-      "uri": "file:///home/tgingold/work/ghdl-language-server/ghdl-ls/tests/files/heartbeat.vhdl",
+      "uri": "file://files/heartbeat.vhdl",
       "diagnostics": []
     }
   },
@@ -47,7 +47,7 @@
         "kind": 2,
         "name": "heartbeat",
         "location": {
-          "uri": "file:///home/tgingold/work/ghdl-language-server/ghdl-ls/tests/files/heartbeat.vhdl",
+          "uri": "file://files/heartbeat.vhdl",
           "range": {
             "start": {
               "line": 4,
@@ -64,7 +64,7 @@
         "kind": 2,
         "name": "behaviour",
         "location": {
-          "uri": "file:///home/tgingold/work/ghdl-language-server/ghdl-ls/tests/files/heartbeat.vhdl",
+          "uri": "file://files/heartbeat.vhdl",
           "range": {
             "start": {
               "line": 8,
@@ -81,7 +81,7 @@
         "kind": 6,
         "name": "clk_process",
         "location": {
-          "uri": "file:///home/tgingold/work/ghdl-language-server/ghdl-ls/tests/files/heartbeat.vhdl",
+          "uri": "file://files/heartbeat.vhdl",
           "range": {
             "start": {
               "line": 13,
@@ -97,7 +97,7 @@
           "kind": 2,
           "name": "behaviour",
           "location": {
-            "uri": "file:///home/tgingold/work/ghdl-language-server/ghdl-ls/tests/files/heartbeat.vhdl",
+            "uri": "file://files/heartbeat.vhdl",
             "range": {
               "start": {
                 "line": 8,
diff --git a/testsuite/pyunit/lsp/008errnofile/cmds.json b/testsuite/pyunit/lsp/008errnofile/cmds.json
index ba9b35a55..4d6a26d57 100644
--- a/testsuite/pyunit/lsp/008errnofile/cmds.json
+++ b/testsuite/pyunit/lsp/008errnofile/cmds.json
@@ -5,8 +5,8 @@
     "method": "initialize",
     "params": {
       "processId": 19954,
-      "rootPath": "/home/tgingold/work/ghdl-language-server/ghdl-ls/tests/008errnofile",
-      "rootUri": "file:///home/tgingold/work/ghdl-language-server/ghdl-ls/tests/008errnofile",
+      "rootPath": ".",
+      "rootUri": "file://.",
       "capabilities": {
         "workspace": {
           "applyEdit": true,