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| author | Tristan Gingold <tgingold@free.fr> | 2020-08-06 22:00:36 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2020-08-06 22:00:36 +0200 |
| commit | bd09899fcaa7ac895fb673fbddc1ef60aac59b3b (patch) | |
| tree | 48c5f8c19f15a770104581f1da9192ff4dd9bd52 | |
| parent | cd8f99e3bb1567c0d879b3eb68d7fe020d080280 (diff) | |
| download | ghdl-bd09899fcaa7ac895fb673fbddc1ef60aac59b3b.tar.gz ghdl-bd09899fcaa7ac895fb673fbddc1ef60aac59b3b.tar.bz2 ghdl-bd09899fcaa7ac895fb673fbddc1ef60aac59b3b.zip | |
synth: handle an operation from std_logic_unsigned. For #1426
| -rw-r--r-- | src/synth/synth-oper.adb | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/synth/synth-oper.adb b/src/synth/synth-oper.adb index 2819469f3..65c836605 100644 --- a/src/synth/synth-oper.adb +++ b/src/synth/synth-oper.adb @@ -1264,7 +1264,8 @@ package body Synth.Oper is when Iir_Predefined_Ieee_Std_Logic_Arith_Ne_Int_Uns => -- "/=" (Integer, Unsigned) return Synth_Compare_Int_Uns (Id_Ne, Expr_Typ); - when Iir_Predefined_Ieee_Std_Logic_Arith_Ne_Uns_Int => + when Iir_Predefined_Ieee_Std_Logic_Arith_Ne_Uns_Int + | Iir_Predefined_Ieee_Std_Logic_Unsigned_Ne_Slv_Int => -- "/=" (Unsigned, Integer) return Synth_Compare_Uns_Int (Id_Ne, Expr_Typ); when Iir_Predefined_Ieee_Std_Logic_Arith_Ne_Uns_Sgn => |