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authorTristan Gingold <tgingold@free.fr>2019-10-22 21:15:47 +0200
committerTristan Gingold <tgingold@free.fr>2019-10-23 18:41:50 +0200
commita9228e0cba373e9d96a592d9c1e4680a2f050087 (patch)
treecfbbbb25fbad047522b26d5a8b6bfe04698de5bd
parent0af29d861903a5ed67e001d9bb403fbbae6a258b (diff)
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vhdl-sem_psl: analyze some declarations.
-rw-r--r--src/vhdl/vhdl-sem_psl.adb18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/vhdl/vhdl-sem_psl.adb b/src/vhdl/vhdl-sem_psl.adb
index 4cdc834dd..7bf1f1f6c 100644
--- a/src/vhdl/vhdl-sem_psl.adb
+++ b/src/vhdl/vhdl-sem_psl.adb
@@ -31,6 +31,7 @@ with Vhdl.Sem_Stmts; use Vhdl.Sem_Stmts;
with Vhdl.Sem_Scopes;
with Vhdl.Sem_Names;
with Vhdl.Sem_Lib;
+with Vhdl.Sem_Decls;
with Vhdl.Utils; use Vhdl.Utils;
with Vhdl.Evaluation; use Vhdl.Evaluation;
with Vhdl.Std_Package;
@@ -948,6 +949,8 @@ package body Vhdl.Sem_Psl is
Entity : Iir;
Arch : Iir;
Item : Iir;
+ Prev_Item : Iir;
+ Attr_Spec_Chain : Iir;
begin
if Hier_Name = Null_Iir then
-- Hierarchical name is optional.
@@ -985,6 +988,8 @@ package body Vhdl.Sem_Psl is
Sem_Scopes.Extend_Scope_Of_Block_Declarations (Arch);
end if;
+ Attr_Spec_Chain := Null_Iir;
+ Prev_Item := Null_Iir;
Item := Get_Vunit_Item_Chain (Unit);
while Item /= Null_Iir loop
case Get_Kind (Item) is
@@ -998,10 +1003,23 @@ package body Vhdl.Sem_Psl is
Sem_Psl_Restrict_Directive (Item);
when Iir_Kind_Psl_Cover_Directive =>
Sem_Psl_Cover_Directive (Item);
+ when Iir_Kind_Signal_Declaration
+ | Iir_Kind_Function_Declaration
+ | Iir_Kind_Procedure_Declaration
+ | Iir_Kind_Function_Body
+ | Iir_Kind_Procedure_Body =>
+ Sem_Decls.Sem_Declaration
+ (Item, Prev_Item, False, Attr_Spec_Chain);
when others =>
Error_Kind ("sem_psl_verification_unit", Item);
end case;
+ if Prev_Item = Null_Iir then
+ Set_Vunit_Item_Chain (Unit, Item);
+ else
+ Set_Chain (Prev_Item, Item);
+ end if;
+ Prev_Item := Item;
Item := Get_Chain (Item);
end loop;