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author | Tristan Gingold <tgingold@free.fr> | 2022-12-16 07:45:21 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2022-12-16 18:22:44 +0100 |
commit | a7ee2a9a3c0593a16aab6795eec4d5bc569aebbd (patch) | |
tree | 77494ed0092bb34cd86b59bcd54123f06147395b | |
parent | ecbca396df7cb437e9ed112cdf0c5c2035d43885 (diff) | |
download | ghdl-a7ee2a9a3c0593a16aab6795eec4d5bc569aebbd.tar.gz ghdl-a7ee2a9a3c0593a16aab6795eec4d5bc569aebbd.tar.bz2 ghdl-a7ee2a9a3c0593a16aab6795eec4d5bc569aebbd.zip |
testsuite/synth: add a test for #2270
-rw-r--r-- | testsuite/synth/issue2270/fun.vhdl | 63 | ||||
-rw-r--r-- | testsuite/synth/issue2270/fun1.vhdl | 33 | ||||
-rwxr-xr-x | testsuite/synth/issue2270/testsuite.sh | 7 |
3 files changed, 103 insertions, 0 deletions
diff --git a/testsuite/synth/issue2270/fun.vhdl b/testsuite/synth/issue2270/fun.vhdl new file mode 100644 index 000000000..de7005fd0 --- /dev/null +++ b/testsuite/synth/issue2270/fun.vhdl @@ -0,0 +1,63 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity fun is + port ( + d : in std_logic_vector(3 downto 0); + q : out std_logic_vector(4 downto 0) + ); +end entity; + +architecture behaviour of fun is + + function fp (i : natural; v : std_logic_vector(3 downto 0)) return std_logic is + begin + if i > 3 or i < 0 + then + return 'X'; + else + return v(i); + end if; + end function; + +begin + + process (d) + + impure function get_fp1 (i : natural) return std_logic is + begin + return fp(i, d); + end function; + + impure function get_fp2 (i : natural) return std_logic is + begin + if i > 3 or i < 0 + then + return 'X'; + else + return d(i); + end if; + end function; + + variable fp3 : std_logic := '0'; + impure function get_fp3 return std_logic is + begin + fp3 := not fp3; + return fp3; + end function; + + impure function get_fp4 return std_logic is + begin + return '0'; + end function; + + begin + q(0) <= fp(0, d); + q(1) <= get_fp4; + q(2) <= get_fp1(0); + q(3) <= get_fp2(0); + q(4) <= get_fp3; + end process; + +end architecture; + diff --git a/testsuite/synth/issue2270/fun1.vhdl b/testsuite/synth/issue2270/fun1.vhdl new file mode 100644 index 000000000..ec7471173 --- /dev/null +++ b/testsuite/synth/issue2270/fun1.vhdl @@ -0,0 +1,33 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity fun1 is + port ( + d : in std_logic_vector(3 downto 0); + q : out std_logic_vector(4 downto 0) + ); +end entity; + +architecture behaviour of fun1 is + + function fp (i : natural; v : std_logic_vector(3 downto 0)) return std_logic is + begin + if i > 3 or i < 0 + then + return 'X'; + else + return v(i); + end if; + end function; + +begin + process (d) + impure function get_fp1 (i : natural) return std_logic is + begin + return fp(i, d); + end function; + begin + q <= (others => '0'); + q(2) <= get_fp1(0); + end process; +end architecture; diff --git a/testsuite/synth/issue2270/testsuite.sh b/testsuite/synth/issue2270/testsuite.sh new file mode 100755 index 000000000..24048ebc7 --- /dev/null +++ b/testsuite/synth/issue2270/testsuite.sh @@ -0,0 +1,7 @@ +#! /bin/sh + +. ../../testenv.sh + +synth_only fun + +echo "Test successful" |