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author | Tristan Gingold <tgingold@free.fr> | 2022-03-18 07:57:31 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2022-03-18 07:57:31 +0100 |
commit | a23c345495bfc7d17dfd788926d3c0441c1baf0e (patch) | |
tree | 51025aba14c57b0882eabd9e5597467b6d6b99a0 | |
parent | f1b1d83f51b3fc3415d870d35ed0eba2a98c7cd9 (diff) | |
download | ghdl-a23c345495bfc7d17dfd788926d3c0441c1baf0e.tar.gz ghdl-a23c345495bfc7d17dfd788926d3c0441c1baf0e.tar.bz2 ghdl-a23c345495bfc7d17dfd788926d3c0441c1baf0e.zip |
testsuite/synth: add a test for #2011
-rw-r--r-- | testsuite/synth/issue2011/tb_testcase.vhdl | 25 | ||||
-rw-r--r-- | testsuite/synth/issue2011/testcase.vhdl | 26 | ||||
-rwxr-xr-x | testsuite/synth/issue2011/testsuite.sh | 8 |
3 files changed, 59 insertions, 0 deletions
diff --git a/testsuite/synth/issue2011/tb_testcase.vhdl b/testsuite/synth/issue2011/tb_testcase.vhdl new file mode 100644 index 000000000..38c879450 --- /dev/null +++ b/testsuite/synth/issue2011/tb_testcase.vhdl @@ -0,0 +1,25 @@ +entity tb_testcase is +end tb_testcase; + +library ieee; +use ieee.std_logic_1164.all; + +architecture behav of tb_testcase is + signal sel : std_ulogic_vector(3 downto 0); + signal result : std_ulogic_vector(63 downto 0); +begin + dut: entity work.testcase + port map (sel, result); + + process + begin + sel <= "0000"; + wait for 1 ns; + assert result = x"00000000_00000000"; + + sel <= "1101"; + wait for 1 ns; + assert result = x"ffffffff_00000000"; + wait; + end process; +end behav; diff --git a/testsuite/synth/issue2011/testcase.vhdl b/testsuite/synth/issue2011/testcase.vhdl new file mode 100644 index 000000000..3e4b7995c --- /dev/null +++ b/testsuite/synth/issue2011/testcase.vhdl @@ -0,0 +1,26 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +entity testcase is + port ( + misc_sel : in std_ulogic_vector(3 downto 0); + result : out std_ulogic_vector(63 downto 0) + ); +end entity testcase; + +architecture behaviour of testcase is +begin + testcase_0: process(all) + variable misc : std_ulogic_vector(63 downto 0); + begin + case misc_sel is + when "1101" => + misc := x"FFFFFFFF00000000"; + --misc := x"FFFFFFFF80000000"; + when others => + misc := x"0000000000000000"; + end case; + result <= misc; + end process; +end architecture behaviour; diff --git a/testsuite/synth/issue2011/testsuite.sh b/testsuite/synth/issue2011/testsuite.sh new file mode 100755 index 000000000..5a1802f70 --- /dev/null +++ b/testsuite/synth/issue2011/testsuite.sh @@ -0,0 +1,8 @@ +#! /bin/sh + +. ../../testenv.sh + +export GHDL_STD_FLAGS=--std=08 +synth_tb testcase + +echo "Test successful" |