std_names: add name keep.

3 files changed, 186 insertions, 183 deletions

diff --git a/pyGHDL/libghdl/std_names.py b/pyGHDL/libghdl/std_names.py
index 7f27a0116..f1f63f12a 100644
--- a/pyGHDL/libghdl/std_names.py
+++ b/pyGHDL/libghdl/std_names.py
@@ -644,185 +644,186 @@ class Name:
     Anyseq = 847
     Gclk = 848
     Loc = 849
-    Last_Synthesis = 849
-    First_Directive = 850
-    Define = 850
-    Endif = 851
-    Ifdef = 852
-    Ifndef = 853
-    Include = 854
-    Timescale = 855
-    Undef = 856
-    Protect = 857
-    Begin_Protected = 858
-    End_Protected = 859
-    Key_Block = 860
-    Data_Block = 861
-    Line = 862
-    Celldefine = 863
-    Endcelldefine = 864
-    Default_Nettype = 865
-    Resetall = 866
-    Last_Directive = 866
-    First_Systask = 867
-    Bits = 867
-    D_Root = 868
-    D_Unit = 869
-    Last_Systask = 869
-    First_SV_Method = 870
-    Size = 870
-    Insert = 871
-    Delete = 872
-    Pop_Front = 873
-    Pop_Back = 874
-    Push_Front = 875
-    Push_Back = 876
-    Name = 877
-    Len = 878
-    Substr = 879
-    Exists = 880
-    Atoi = 881
-    Itoa = 882
-    Find = 883
-    Find_Index = 884
-    Find_First = 885
-    Find_First_Index = 886
-    Find_Last = 887
-    Find_Last_Index = 888
-    Num = 889
-    Randomize = 890
-    Pre_Randomize = 891
-    Post_Randomize = 892
-    Srandom = 893
-    Get_Randstate = 894
-    Set_Randstate = 895
-    Seed = 896
-    State = 897
-    Last_SV_Method = 897
-    First_BSV = 898
-    uAction = 898
-    uActionValue = 899
-    BVI = 900
-    uC = 901
-    uCF = 902
-    uE = 903
-    uSB = 904
-    uSBR = 905
-    Action = 906
-    Endaction = 907
-    Actionvalue = 908
-    Endactionvalue = 909
-    Ancestor = 910
-    Clocked_By = 911
-    Default_Clock = 912
-    Default_Reset = 913
-    Dependencies = 914
-    Deriving = 915
-    Determines = 916
-    Enable = 917
-    Ifc_Inout = 918
-    Input_Clock = 919
-    Input_Reset = 920
-    Instance = 921
-    Endinstance = 922
-    Let = 923
-    Match = 924
-    Method = 925
-    Endmethod = 926
-    Numeric = 927
-    Output_Clock = 928
-    Output_Reset = 929
-    Par = 930
-    Endpar = 931
-    Path = 932
-    Provisos = 933
-    Ready = 934
-    Reset_By = 935
-    Rule = 936
-    Endrule = 937
-    Rules = 938
-    Endrules = 939
-    Same_Family = 940
-    Schedule = 941
-    Seq = 942
-    Endseq = 943
-    Typeclass = 944
-    Endtypeclass = 945
-    Valueof = 946
-    uValueof = 947
-    Last_BSV = 947
-    First_Comment = 948
-    Psl = 948
-    Pragma = 949
-    Synthesis = 950
-    Synopsys = 951
-    Translate_Off = 952
-    Translate_On = 953
-    Translate = 954
-    Synthesis_Off = 955
-    Synthesis_On = 956
-    Off = 957
-    Full_Case = 958
-    Parallel_Case = 959
-    Last_Comment = 959
-    First_PSL = 960
-    A = 960
-    Af = 961
-    Ag = 962
-    Ax = 963
-    Abort = 964
-    Assume_Guarantee = 965
-    Async_Abort = 966
-    Before = 967
-    Clock = 968
-    E = 969
-    Ef = 970
-    Eg = 971
-    Ex = 972
-    Endpoint = 973
-    Eventually = 974
-    Fairness = 975
-    Fell = 976
-    Forall = 977
-    G = 978
-    Inf = 979
-    Inherit = 980
-    Never = 981
-    Next_A = 982
-    Next_E = 983
-    Next_Event = 984
-    Next_Event_A = 985
-    Next_Event_E = 986
-    Onehot = 987
-    Onehot0 = 988
-    Prev = 989
-    Rose = 990
-    Strong = 991
-    Sync_Abort = 992
-    W = 993
-    Whilenot = 994
-    Within = 995
-    X = 996
-    Last_PSL = 996
-    First_Edif = 997
-    Celltype = 1007
-    View = 1008
-    Viewtype = 1009
-    Direction = 1010
-    Contents = 1011
-    Net = 1012
-    Viewref = 1013
-    Cellref = 1014
-    Libraryref = 1015
-    Portinstance = 1016
-    Joined = 1017
-    Portref = 1018
-    Instanceref = 1019
-    Design = 1020
-    Designator = 1021
-    Owner = 1022
-    Member = 1023
-    Number = 1024
-    Rename = 1025
-    Userdata = 1026
-    Last_Edif = 1026
+    Keep = 850
+    Last_Synthesis = 850
+    First_Directive = 851
+    Define = 851
+    Endif = 852
+    Ifdef = 853
+    Ifndef = 854
+    Include = 855
+    Timescale = 856
+    Undef = 857
+    Protect = 858
+    Begin_Protected = 859
+    End_Protected = 860
+    Key_Block = 861
+    Data_Block = 862
+    Line = 863
+    Celldefine = 864
+    Endcelldefine = 865
+    Default_Nettype = 866
+    Resetall = 867
+    Last_Directive = 867
+    First_Systask = 868
+    Bits = 868
+    D_Root = 869
+    D_Unit = 870
+    Last_Systask = 870
+    First_SV_Method = 871
+    Size = 871
+    Insert = 872
+    Delete = 873
+    Pop_Front = 874
+    Pop_Back = 875
+    Push_Front = 876
+    Push_Back = 877
+    Name = 878
+    Len = 879
+    Substr = 880
+    Exists = 881
+    Atoi = 882
+    Itoa = 883
+    Find = 884
+    Find_Index = 885
+    Find_First = 886
+    Find_First_Index = 887
+    Find_Last = 888
+    Find_Last_Index = 889
+    Num = 890
+    Randomize = 891
+    Pre_Randomize = 892
+    Post_Randomize = 893
+    Srandom = 894
+    Get_Randstate = 895
+    Set_Randstate = 896
+    Seed = 897
+    State = 898
+    Last_SV_Method = 898
+    First_BSV = 899
+    uAction = 899
+    uActionValue = 900
+    BVI = 901
+    uC = 902
+    uCF = 903
+    uE = 904
+    uSB = 905
+    uSBR = 906
+    Action = 907
+    Endaction = 908
+    Actionvalue = 909
+    Endactionvalue = 910
+    Ancestor = 911
+    Clocked_By = 912
+    Default_Clock = 913
+    Default_Reset = 914
+    Dependencies = 915
+    Deriving = 916
+    Determines = 917
+    Enable = 918
+    Ifc_Inout = 919
+    Input_Clock = 920
+    Input_Reset = 921
+    Instance = 922
+    Endinstance = 923
+    Let = 924
+    Match = 925
+    Method = 926
+    Endmethod = 927
+    Numeric = 928
+    Output_Clock = 929
+    Output_Reset = 930
+    Par = 931
+    Endpar = 932
+    Path = 933
+    Provisos = 934
+    Ready = 935
+    Reset_By = 936
+    Rule = 937
+    Endrule = 938
+    Rules = 939
+    Endrules = 940
+    Same_Family = 941
+    Schedule = 942
+    Seq = 943
+    Endseq = 944
+    Typeclass = 945
+    Endtypeclass = 946
+    Valueof = 947
+    uValueof = 948
+    Last_BSV = 948
+    First_Comment = 949
+    Psl = 949
+    Pragma = 950
+    Synthesis = 951
+    Synopsys = 952
+    Translate_Off = 953
+    Translate_On = 954
+    Translate = 955
+    Synthesis_Off = 956
+    Synthesis_On = 957
+    Off = 958
+    Full_Case = 959
+    Parallel_Case = 960
+    Last_Comment = 960
+    First_PSL = 961
+    A = 961
+    Af = 962
+    Ag = 963
+    Ax = 964
+    Abort = 965
+    Assume_Guarantee = 966
+    Async_Abort = 967
+    Before = 968
+    Clock = 969
+    E = 970
+    Ef = 971
+    Eg = 972
+    Ex = 973
+    Endpoint = 974
+    Eventually = 975
+    Fairness = 976
+    Fell = 977
+    Forall = 978
+    G = 979
+    Inf = 980
+    Inherit = 981
+    Never = 982
+    Next_A = 983
+    Next_E = 984
+    Next_Event = 985
+    Next_Event_A = 986
+    Next_Event_E = 987
+    Onehot = 988
+    Onehot0 = 989
+    Prev = 990
+    Rose = 991
+    Strong = 992
+    Sync_Abort = 993
+    W = 994
+    Whilenot = 995
+    Within = 996
+    X = 997
+    Last_PSL = 997
+    First_Edif = 998
+    Celltype = 1008
+    View = 1009
+    Viewtype = 1010
+    Direction = 1011
+    Contents = 1012
+    Net = 1013
+    Viewref = 1014
+    Cellref = 1015
+    Libraryref = 1016
+    Portinstance = 1017
+    Joined = 1018
+    Portref = 1019
+    Instanceref = 1020
+    Design = 1021
+    Designator = 1022
+    Owner = 1023
+    Member = 1024
+    Number = 1025
+    Rename = 1026
+    Userdata = 1027
+    Last_Edif = 1027
diff --git a/src/std_names.adb b/src/std_names.adb
index ffbfce1ef..ceabfec97 100644
--- a/src/std_names.adb
+++ b/src/std_names.adb
@@ -685,6 +685,7 @@ package body Std_Names is
       Def ("anyseq",             Name_Anyseq);
       Def ("gclk",               Name_Gclk);
       Def ("loc",                Name_Loc);
+      Def ("keep",               Name_Keep);
 
       --  Verilog directives
       Def ("define",          Name_Define);
diff --git a/src/std_names.ads b/src/std_names.ads
index 45558cb48..4022a7493 100644
--- a/src/std_names.ads
+++ b/src/std_names.ads
@@ -770,7 +770,8 @@ package Std_Names is
    Name_Anyseq             : constant Name_Id := Name_First_Synthesis + 003;
    Name_Gclk               : constant Name_Id := Name_First_Synthesis + 004;
    Name_Loc                : constant Name_Id := Name_First_Synthesis + 005;
-   Name_Last_Synthesis     : constant Name_Id := Name_Loc;
+   Name_Keep               : constant Name_Id := Name_First_Synthesis + 006;
+   Name_Last_Synthesis     : constant Name_Id := Name_Keep;
 
    --  Verilog Directives.
    Name_First_Directive : constant Name_Id := Name_Last_Synthesis + 1;