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| author | Tristan Gingold <tgingold@free.fr> | 2020-07-01 06:00:00 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2020-07-01 06:00:00 +0200 |
| commit | 860fcd60a395d0e3f599b5ae7bb47a4792fd9647 (patch) | |
| tree | d4969bc32df14ff71d89951e713df19850c3a3ae | |
| parent | e854f72b1ef2b83ded3812d2b913c4c30aaef86b (diff) | |
| download | ghdl-860fcd60a395d0e3f599b5ae7bb47a4792fd9647.tar.gz ghdl-860fcd60a395d0e3f599b5ae7bb47a4792fd9647.tar.bz2 ghdl-860fcd60a395d0e3f599b5ae7bb47a4792fd9647.zip | |
vhdl-nodes: reduce size of Iterator_Declaration.
| -rw-r--r-- | src/vhdl/vhdl-nodes.adb | 6 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 6 |
2 files changed, 6 insertions, 6 deletions
diff --git a/src/vhdl/vhdl-nodes.adb b/src/vhdl/vhdl-nodes.adb index 0a7f1266a..b74f4b307 100644 --- a/src/vhdl/vhdl-nodes.adb +++ b/src/vhdl/vhdl-nodes.adb @@ -1065,6 +1065,7 @@ package body Vhdl.Nodes is | Iir_Kind_Guard_Signal_Declaration | Iir_Kind_Signal_Declaration | Iir_Kind_Variable_Declaration + | Iir_Kind_Iterator_Declaration | Iir_Kind_Interface_Constant_Declaration | Iir_Kind_Interface_Variable_Declaration | Iir_Kind_Interface_Signal_Declaration @@ -1263,7 +1264,6 @@ package body Vhdl.Nodes is | Iir_Kind_Through_Quantity_Declaration | Iir_Kind_File_Declaration | Iir_Kind_Constant_Declaration - | Iir_Kind_Iterator_Declaration | Iir_Kind_Interface_Package_Declaration | Iir_Kind_Interface_Function_Declaration | Iir_Kind_Interface_Procedure_Declaration @@ -2873,7 +2873,7 @@ package body Vhdl.Nodes is pragma Assert (Target /= Null_Iir); pragma Assert (Has_Discrete_Range (Get_Kind (Target)), "no field Discrete_Range"); - return Get_Field6 (Target); + return Get_Field4 (Target); end Get_Discrete_Range; procedure Set_Discrete_Range (Target : Iir; Rng : Iir) is @@ -2881,7 +2881,7 @@ package body Vhdl.Nodes is pragma Assert (Target /= Null_Iir); pragma Assert (Has_Discrete_Range (Get_Kind (Target)), "no field Discrete_Range"); - Set_Field6 (Target, Rng); + Set_Field4 (Target, Rng); end Set_Discrete_Range; function Get_Type_Definition (Decl : Iir) return Iir is diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 02d5866ef..5c2ed4886 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -1835,7 +1835,7 @@ package Vhdl.Nodes is -- Get/Set_Signal_Attribute_Chain (Field3) -- Iir_Kind_Constant_Declaration (Medium) - -- Iir_Kind_Iterator_Declaration (Medium) + -- Iir_Kind_Iterator_Declaration (Short) -- -- Get/Set_Parent (Field0) -- @@ -1847,7 +1847,7 @@ package Vhdl.Nodes is -- Get/Set_Subtype_Indication (Field5) -- -- Only for Iir_Kind_Iterator_Declaration: - -- Get/Set_Discrete_Range (Field6) + -- Get/Set_Discrete_Range (Field4) -- -- Only for Iir_Kind_Constant_Declaration: -- Default value of a deferred constant points to the full constant @@ -7686,7 +7686,7 @@ package Vhdl.Nodes is -- Discrete range of an iterator. During analysis, a subtype indiciation -- is created from this range. - -- Field: Field6 + -- Field: Field4 function Get_Discrete_Range (Target : Iir) return Iir; procedure Set_Discrete_Range (Target : Iir; Rng : Iir); |