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| author | Tristan Gingold <tgingold@free.fr> | 2022-09-21 03:15:48 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-09-21 03:15:48 +0200 |
| commit | 855524690a5d85b14ae0769885f2f950c5b88158 (patch) | |
| tree | 8d67ff39149381712076781fd278a0ec8c5f4617 | |
| parent | 7a744c1c68b3bd13779ab7a38b681353f07b8f81 (diff) | |
| download | ghdl-855524690a5d85b14ae0769885f2f950c5b88158.tar.gz ghdl-855524690a5d85b14ae0769885f2f950c5b88158.tar.bz2 ghdl-855524690a5d85b14ae0769885f2f950c5b88158.zip | |
synth-vhdl_insts: move pragma unreferenced
| -rw-r--r-- | src/synth/synth-vhdl_insts.adb | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/synth/synth-vhdl_insts.adb b/src/synth/synth-vhdl_insts.adb index 10c355032..fc9788f78 100644 --- a/src/synth/synth-vhdl_insts.adb +++ b/src/synth/synth-vhdl_insts.adb @@ -726,7 +726,6 @@ package body Synth.Vhdl_Insts is N_Off : Uns32; N : Net; Base : Valtyp; - pragma Unreferenced (Base); Offs : Value_Offsets; Dyn : Dyn_Name; begin @@ -752,6 +751,8 @@ package body Synth.Vhdl_Insts is Iassoc := Get_Chain (Iassoc); end loop; + pragma Unreferenced (Base); + -- Then: -- 1. sort table by offset Sort_Value_Offset (Els); |