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author | Tristan Gingold <tgingold@free.fr> | 2020-01-12 21:34:03 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2020-01-12 21:34:03 +0100 |
commit | 83669ed954d6890747815b7e85b3abb27085ad5d (patch) | |
tree | 7e168a51ae1ea85046812e10aa0e0066c3600dbd | |
parent | 7b60fc68cf36f3fb1861f525bfabc78e4f99a036 (diff) | |
download | ghdl-83669ed954d6890747815b7e85b3abb27085ad5d.tar.gz ghdl-83669ed954d6890747815b7e85b3abb27085ad5d.tar.bz2 ghdl-83669ed954d6890747815b7e85b3abb27085ad5d.zip |
testsuite/synth: add a test for #1086
-rw-r--r-- | testsuite/synth/issue1086/test.vhdl | 16 | ||||
-rwxr-xr-x | testsuite/synth/issue1086/testsuite.sh | 10 |
2 files changed, 26 insertions, 0 deletions
diff --git a/testsuite/synth/issue1086/test.vhdl b/testsuite/synth/issue1086/test.vhdl new file mode 100644 index 000000000..b88616eea --- /dev/null +++ b/testsuite/synth/issue1086/test.vhdl @@ -0,0 +1,16 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity test is +end entity test; + +architecture rtl of test is + type reg_internal_type is record + outstanding : integer; + end record; +begin + control1 : process(all) + variable v_int : reg_internal_type; + begin + end process; +end; diff --git a/testsuite/synth/issue1086/testsuite.sh b/testsuite/synth/issue1086/testsuite.sh new file mode 100755 index 000000000..3041b9611 --- /dev/null +++ b/testsuite/synth/issue1086/testsuite.sh @@ -0,0 +1,10 @@ +#! /bin/sh + +. ../../testenv.sh + +GHDL_STD_FLAGS=--std=08 + +synth test.vhdl -e > syn_test.vhdl +clean + +echo "Test successful" |