synth: preliminary work for PSL endpoints

2 files changed, 19 insertions, 1 deletions

diff --git a/src/synth/synth-vhdl_stmts.adb b/src/synth/synth-vhdl_stmts.adb
index fcf4fb498..a61137cdd 100644
--- a/src/synth/synth-vhdl_stmts.adb
+++ b/src/synth/synth-vhdl_stmts.adb
@@ -4695,6 +4695,21 @@ package body Synth.Vhdl_Stmts is
       end if;
    end Synth_Psl_Assert_Directive;
 
+   procedure Synth_Psl_Endpoint_Declaration
+     (Syn_Inst : Synth_Instance_Acc; Stmt : Node)
+   is
+      pragma Unreferenced (Syn_Inst, Stmt);
+   begin
+      if not Flags.Flag_Formal then
+         return;
+      end if;
+
+      --  TODO
+      --  Mutate object to a net
+      --  Assign the net.
+      raise Internal_Error;
+   end Synth_Psl_Endpoint_Declaration;
+
    procedure Synth_Generate_Statement_Body
      (Syn_Inst : Synth_Instance_Acc; Bod : Node)
    is
@@ -4990,6 +5005,8 @@ package body Synth.Vhdl_Stmts is
                Synth_Psl_Restrict_Directive (Syn_Inst, Item);
             when Iir_Kind_Psl_Cover_Directive =>
                Synth_Psl_Cover_Directive (Syn_Inst, Item);
+            when Iir_Kind_Psl_Endpoint_Declaration =>
+               Synth_Psl_Endpoint_Declaration (Syn_Inst, Item);
             when Iir_Kind_Signal_Declaration
                | Iir_Kind_Constant_Declaration
                | Iir_Kind_Function_Declaration
diff --git a/src/vhdl/vhdl-nodes_walk.adb b/src/vhdl/vhdl-nodes_walk.adb
index 63deb3b53..b3215236d 100644
--- a/src/vhdl/vhdl-nodes_walk.adb
+++ b/src/vhdl/vhdl-nodes_walk.adb
@@ -159,7 +159,8 @@ package body Vhdl.Nodes_Walk is
            | Iir_Kind_Component_Instantiation_Statement
            | Iir_Kinds_Simultaneous_Statement
            | Iir_Kind_Psl_Default_Clock
-           | Iir_Kind_Psl_Declaration =>
+           | Iir_Kind_Psl_Declaration
+           | Iir_Kind_Psl_Endpoint_Declaration =>
             Status := Cb.all (Stmt);
          when Iir_Kind_Block_Statement =>
             Status := Cb.all (Stmt);