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author | Tristan Gingold <tgingold@free.fr> | 2020-04-22 18:33:28 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2020-04-22 18:33:28 +0200 |
commit | 6a5129501daf45e5292349402da81c3bf905db6b (patch) | |
tree | 60a19ee69b142a2fef038e556cc543d9560f6a01 | |
parent | 4bb12b30a53326ac6e3177bc4016317181dd7f7e (diff) | |
download | ghdl-6a5129501daf45e5292349402da81c3bf905db6b.tar.gz ghdl-6a5129501daf45e5292349402da81c3bf905db6b.tar.bz2 ghdl-6a5129501daf45e5292349402da81c3bf905db6b.zip |
netlists: add resolver gate.
-rw-r--r-- | src/synth/netlists-builders.adb | 18 | ||||
-rw-r--r-- | src/synth/netlists-builders.ads | 3 | ||||
-rw-r--r-- | src/synth/netlists-disp_vhdl.adb | 5 |
3 files changed, 26 insertions, 0 deletions
diff --git a/src/synth/netlists-builders.adb b/src/synth/netlists-builders.adb index cf7a4ff71..bd8423dac 100644 --- a/src/synth/netlists-builders.adb +++ b/src/synth/netlists-builders.adb @@ -740,6 +740,8 @@ package body Netlists.Builders is Create_Formal_Input (Res, Id_Anyseq, Name_Anyseq); Create_Tri_Module (Res); + Create_Dyadic_Module (Design, Res.M_Resolver, + Get_Identifier ("resolver"), Id_Resolver); return Res; end Build_Builders; @@ -1534,6 +1536,22 @@ package body Netlists.Builders is return O; end Build_Tri; + -- Reuse Build_Dyadic ? + function Build_Resolver (Ctxt : Context_Acc; L, R : Net) return Net + is + Wd : constant Width := Get_Width (L); + pragma Assert (Get_Width (R) = Wd); + Inst : Instance; + O : Net; + begin + Inst := New_Internal_Instance (Ctxt, Ctxt.M_Resolver); + O := Get_Output (Inst, 0); + Set_Width (O, Wd); + Connect (Get_Input (Inst, 0), L); + Connect (Get_Input (Inst, 1), R); + return O; + end Build_Resolver; + function Build_Extract (Ctxt : Context_Acc; I : Net; Off, W : Width) return Net is diff --git a/src/synth/netlists-builders.ads b/src/synth/netlists-builders.ads index 09b5c4854..e9b350a74 100644 --- a/src/synth/netlists-builders.ads +++ b/src/synth/netlists-builders.ads @@ -204,6 +204,8 @@ package Netlists.Builders is function Build_Tri (Ctxt : Context_Acc; En : Net; D : Net) return Net; + function Build_Resolver (Ctxt : Context_Acc; L, R : Net) return Net; + function Build_Nop (Ctxt : Context_Acc; I : Net) return Net; private type Module_Arr is array (Module_Id range <>) of Module; @@ -243,6 +245,7 @@ private M_Mdff : Module; M_Midff : Module; M_Tri : Module; + M_Resolver : Module; M_Truncate : Module_Arr (Truncate_Module_Id); M_Extend : Module_Arr (Extend_Module_Id); M_Reduce : Module_Arr (Reduce_Module_Id); diff --git a/src/synth/netlists-disp_vhdl.adb b/src/synth/netlists-disp_vhdl.adb index 23e1cb782..383d161d6 100644 --- a/src/synth/netlists-disp_vhdl.adb +++ b/src/synth/netlists-disp_vhdl.adb @@ -1261,6 +1261,11 @@ package body Netlists.Disp_Vhdl is Disp_Template (" \l0: assert \i0 = '1' severity note; -- assert_cover" & NL, Inst); + when Id_Resolver => + Disp_Template + (" \o0 <= \i0;" & NL, Inst); + Disp_Template + (" \o0 <= \i1;" & NL, Inst); when others => Disp_Instance_Gate (Inst); end case; |