diff options
author | Tristan Gingold <tgingold@free.fr> | 2023-04-14 16:46:45 +0200 |
---|---|---|
committer | Tristan Gingold <tgingold@free.fr> | 2023-04-14 16:46:45 +0200 |
commit | 6526eae3f265fc490adeeb537eb938b68a4b02d9 (patch) | |
tree | 8ded0648805fb4134ac2dd57e79f96cd211eec66 | |
parent | de71ceb21895464e2e716cf84351f100644f49b0 (diff) | |
download | ghdl-6526eae3f265fc490adeeb537eb938b68a4b02d9.tar.gz ghdl-6526eae3f265fc490adeeb537eb938b68a4b02d9.tar.bz2 ghdl-6526eae3f265fc490adeeb537eb938b68a4b02d9.zip |
vhdl: recognize conv_signed. For #2408
-rw-r--r-- | pyGHDL/libghdl/vhdl/nodes.py | 280 | ||||
-rw-r--r-- | src/vhdl/vhdl-ieee-std_logic_arith.adb | 8 | ||||
-rw-r--r-- | src/vhdl/vhdl-nodes.ads | 5 |
3 files changed, 155 insertions, 138 deletions
diff --git a/pyGHDL/libghdl/vhdl/nodes.py b/pyGHDL/libghdl/vhdl/nodes.py index 72c2c57f6..e91d44a81 100644 --- a/pyGHDL/libghdl/vhdl/nodes.py +++ b/pyGHDL/libghdl/vhdl/nodes.py @@ -1836,144 +1836,148 @@ class Iir_Predefined(IntEnum): Ieee_Std_Logic_Arith_Conv_Unsigned_Uns = 614 Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn = 615 Ieee_Std_Logic_Arith_Conv_Unsigned_Log = 616 - Ieee_Std_Logic_Arith_Conv_Integer_Int = 617 - Ieee_Std_Logic_Arith_Conv_Integer_Uns = 618 - Ieee_Std_Logic_Arith_Conv_Integer_Sgn = 619 - Ieee_Std_Logic_Arith_Conv_Integer_Log = 620 - Ieee_Std_Logic_Arith_Conv_Vector_Int = 621 - Ieee_Std_Logic_Arith_Conv_Vector_Uns = 622 - Ieee_Std_Logic_Arith_Conv_Vector_Sgn = 623 - Ieee_Std_Logic_Arith_Conv_Vector_Log = 624 - Ieee_Std_Logic_Arith_Ext = 625 - Ieee_Std_Logic_Arith_Sxt = 626 - Ieee_Std_Logic_Arith_Id_Uns_Uns = 627 - Ieee_Std_Logic_Arith_Id_Sgn_Sgn = 628 - Ieee_Std_Logic_Arith_Neg_Sgn_Sgn = 629 - Ieee_Std_Logic_Arith_Abs_Sgn_Sgn = 630 - Ieee_Std_Logic_Arith_Shl_Uns = 631 - Ieee_Std_Logic_Arith_Shl_Sgn = 632 - Ieee_Std_Logic_Arith_Shr_Uns = 633 - Ieee_Std_Logic_Arith_Shr_Sgn = 634 - Ieee_Std_Logic_Arith_Id_Uns_Slv = 635 - Ieee_Std_Logic_Arith_Id_Sgn_Slv = 636 - Ieee_Std_Logic_Arith_Neg_Sgn_Slv = 637 - Ieee_Std_Logic_Arith_Abs_Sgn_Slv = 638 - Ieee_Std_Logic_Arith_Mul_Uns_Uns_Uns = 639 - Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Sgn = 640 - Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Sgn = 641 - Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Sgn = 642 - Ieee_Std_Logic_Arith_Mul_Uns_Uns_Slv = 643 - Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Slv = 644 - Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Slv = 645 - Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Slv = 646 - Ieee_Std_Logic_Arith_Add_Uns_Uns_Uns = 647 - Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Sgn = 648 - Ieee_Std_Logic_Arith_Add_Uns_Sgn_Sgn = 649 - Ieee_Std_Logic_Arith_Add_Sgn_Uns_Sgn = 650 - Ieee_Std_Logic_Arith_Add_Uns_Int_Uns = 651 - Ieee_Std_Logic_Arith_Add_Int_Uns_Uns = 652 - Ieee_Std_Logic_Arith_Add_Sgn_Int_Sgn = 653 - Ieee_Std_Logic_Arith_Add_Int_Sgn_Sgn = 654 - Ieee_Std_Logic_Arith_Add_Uns_Log_Uns = 655 - Ieee_Std_Logic_Arith_Add_Log_Uns_Uns = 656 - Ieee_Std_Logic_Arith_Add_Sgn_Log_Sgn = 657 - Ieee_Std_Logic_Arith_Add_Log_Sgn_Sgn = 658 - Ieee_Std_Logic_Arith_Add_Uns_Uns_Slv = 659 - Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Slv = 660 - Ieee_Std_Logic_Arith_Add_Uns_Sgn_Slv = 661 - Ieee_Std_Logic_Arith_Add_Sgn_Uns_Slv = 662 - Ieee_Std_Logic_Arith_Add_Uns_Int_Slv = 663 - Ieee_Std_Logic_Arith_Add_Int_Uns_Slv = 664 - Ieee_Std_Logic_Arith_Add_Sgn_Int_Slv = 665 - Ieee_Std_Logic_Arith_Add_Int_Sgn_Slv = 666 - Ieee_Std_Logic_Arith_Add_Uns_Log_Slv = 667 - Ieee_Std_Logic_Arith_Add_Log_Uns_Slv = 668 - Ieee_Std_Logic_Arith_Add_Sgn_Log_Slv = 669 - Ieee_Std_Logic_Arith_Add_Log_Sgn_Slv = 670 - Ieee_Std_Logic_Arith_Sub_Uns_Uns_Uns = 671 - Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Sgn = 672 - Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Sgn = 673 - Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Sgn = 674 - Ieee_Std_Logic_Arith_Sub_Uns_Int_Uns = 675 - Ieee_Std_Logic_Arith_Sub_Int_Uns_Uns = 676 - Ieee_Std_Logic_Arith_Sub_Sgn_Int_Sgn = 677 - Ieee_Std_Logic_Arith_Sub_Int_Sgn_Sgn = 678 - Ieee_Std_Logic_Arith_Sub_Uns_Log_Uns = 679 - Ieee_Std_Logic_Arith_Sub_Log_Uns_Uns = 680 - Ieee_Std_Logic_Arith_Sub_Sgn_Log_Sgn = 681 - Ieee_Std_Logic_Arith_Sub_Log_Sgn_Sgn = 682 - Ieee_Std_Logic_Arith_Sub_Uns_Uns_Slv = 683 - Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Slv = 684 - Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Slv = 685 - Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Slv = 686 - Ieee_Std_Logic_Arith_Sub_Uns_Int_Slv = 687 - Ieee_Std_Logic_Arith_Sub_Int_Uns_Slv = 688 - Ieee_Std_Logic_Arith_Sub_Sgn_Int_Slv = 689 - Ieee_Std_Logic_Arith_Sub_Int_Sgn_Slv = 690 - Ieee_Std_Logic_Arith_Sub_Uns_Log_Slv = 691 - Ieee_Std_Logic_Arith_Sub_Log_Uns_Slv = 692 - Ieee_Std_Logic_Arith_Sub_Sgn_Log_Slv = 693 - Ieee_Std_Logic_Arith_Sub_Log_Sgn_Slv = 694 - Ieee_Std_Logic_Arith_Lt_Uns_Uns = 695 - Ieee_Std_Logic_Arith_Lt_Sgn_Sgn = 696 - Ieee_Std_Logic_Arith_Lt_Uns_Sgn = 697 - Ieee_Std_Logic_Arith_Lt_Sgn_Uns = 698 - Ieee_Std_Logic_Arith_Lt_Uns_Int = 699 - Ieee_Std_Logic_Arith_Lt_Int_Uns = 700 - Ieee_Std_Logic_Arith_Lt_Sgn_Int = 701 - Ieee_Std_Logic_Arith_Lt_Int_Sgn = 702 - Ieee_Std_Logic_Arith_Le_Uns_Uns = 703 - Ieee_Std_Logic_Arith_Le_Sgn_Sgn = 704 - Ieee_Std_Logic_Arith_Le_Uns_Sgn = 705 - Ieee_Std_Logic_Arith_Le_Sgn_Uns = 706 - Ieee_Std_Logic_Arith_Le_Uns_Int = 707 - Ieee_Std_Logic_Arith_Le_Int_Uns = 708 - Ieee_Std_Logic_Arith_Le_Sgn_Int = 709 - Ieee_Std_Logic_Arith_Le_Int_Sgn = 710 - Ieee_Std_Logic_Arith_Gt_Uns_Uns = 711 - Ieee_Std_Logic_Arith_Gt_Sgn_Sgn = 712 - Ieee_Std_Logic_Arith_Gt_Uns_Sgn = 713 - Ieee_Std_Logic_Arith_Gt_Sgn_Uns = 714 - Ieee_Std_Logic_Arith_Gt_Uns_Int = 715 - Ieee_Std_Logic_Arith_Gt_Int_Uns = 716 - Ieee_Std_Logic_Arith_Gt_Sgn_Int = 717 - Ieee_Std_Logic_Arith_Gt_Int_Sgn = 718 - Ieee_Std_Logic_Arith_Ge_Uns_Uns = 719 - Ieee_Std_Logic_Arith_Ge_Sgn_Sgn = 720 - Ieee_Std_Logic_Arith_Ge_Uns_Sgn = 721 - Ieee_Std_Logic_Arith_Ge_Sgn_Uns = 722 - Ieee_Std_Logic_Arith_Ge_Uns_Int = 723 - Ieee_Std_Logic_Arith_Ge_Int_Uns = 724 - Ieee_Std_Logic_Arith_Ge_Sgn_Int = 725 - Ieee_Std_Logic_Arith_Ge_Int_Sgn = 726 - Ieee_Std_Logic_Arith_Eq_Uns_Uns = 727 - Ieee_Std_Logic_Arith_Eq_Sgn_Sgn = 728 - Ieee_Std_Logic_Arith_Eq_Uns_Sgn = 729 - Ieee_Std_Logic_Arith_Eq_Sgn_Uns = 730 - Ieee_Std_Logic_Arith_Eq_Uns_Int = 731 - Ieee_Std_Logic_Arith_Eq_Int_Uns = 732 - Ieee_Std_Logic_Arith_Eq_Sgn_Int = 733 - Ieee_Std_Logic_Arith_Eq_Int_Sgn = 734 - Ieee_Std_Logic_Arith_Ne_Uns_Uns = 735 - Ieee_Std_Logic_Arith_Ne_Sgn_Sgn = 736 - Ieee_Std_Logic_Arith_Ne_Uns_Sgn = 737 - Ieee_Std_Logic_Arith_Ne_Sgn_Uns = 738 - Ieee_Std_Logic_Arith_Ne_Uns_Int = 739 - Ieee_Std_Logic_Arith_Ne_Int_Uns = 740 - Ieee_Std_Logic_Arith_Ne_Sgn_Int = 741 - Ieee_Std_Logic_Arith_Ne_Int_Sgn = 742 - Ieee_Std_Logic_Misc_And_Reduce_Slv = 743 - Ieee_Std_Logic_Misc_And_Reduce_Suv = 744 - Ieee_Std_Logic_Misc_Nand_Reduce_Slv = 745 - Ieee_Std_Logic_Misc_Nand_Reduce_Suv = 746 - Ieee_Std_Logic_Misc_Or_Reduce_Slv = 747 - Ieee_Std_Logic_Misc_Or_Reduce_Suv = 748 - Ieee_Std_Logic_Misc_Nor_Reduce_Slv = 749 - Ieee_Std_Logic_Misc_Nor_Reduce_Suv = 750 - Ieee_Std_Logic_Misc_Xor_Reduce_Slv = 751 - Ieee_Std_Logic_Misc_Xor_Reduce_Suv = 752 - Ieee_Std_Logic_Misc_Xnor_Reduce_Slv = 753 - Ieee_Std_Logic_Misc_Xnor_Reduce_Suv = 754 + Ieee_Std_Logic_Arith_Conv_Signed_Int = 617 + Ieee_Std_Logic_Arith_Conv_Signed_Uns = 618 + Ieee_Std_Logic_Arith_Conv_Signed_Sgn = 619 + Ieee_Std_Logic_Arith_Conv_Signed_Log = 620 + Ieee_Std_Logic_Arith_Conv_Integer_Int = 621 + Ieee_Std_Logic_Arith_Conv_Integer_Uns = 622 + Ieee_Std_Logic_Arith_Conv_Integer_Sgn = 623 + Ieee_Std_Logic_Arith_Conv_Integer_Log = 624 + Ieee_Std_Logic_Arith_Conv_Vector_Int = 625 + Ieee_Std_Logic_Arith_Conv_Vector_Uns = 626 + Ieee_Std_Logic_Arith_Conv_Vector_Sgn = 627 + Ieee_Std_Logic_Arith_Conv_Vector_Log = 628 + Ieee_Std_Logic_Arith_Ext = 629 + Ieee_Std_Logic_Arith_Sxt = 630 + Ieee_Std_Logic_Arith_Id_Uns_Uns = 631 + Ieee_Std_Logic_Arith_Id_Sgn_Sgn = 632 + Ieee_Std_Logic_Arith_Neg_Sgn_Sgn = 633 + Ieee_Std_Logic_Arith_Abs_Sgn_Sgn = 634 + Ieee_Std_Logic_Arith_Shl_Uns = 635 + Ieee_Std_Logic_Arith_Shl_Sgn = 636 + Ieee_Std_Logic_Arith_Shr_Uns = 637 + Ieee_Std_Logic_Arith_Shr_Sgn = 638 + Ieee_Std_Logic_Arith_Id_Uns_Slv = 639 + Ieee_Std_Logic_Arith_Id_Sgn_Slv = 640 + Ieee_Std_Logic_Arith_Neg_Sgn_Slv = 641 + Ieee_Std_Logic_Arith_Abs_Sgn_Slv = 642 + Ieee_Std_Logic_Arith_Mul_Uns_Uns_Uns = 643 + Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Sgn = 644 + Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Sgn = 645 + Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Sgn = 646 + Ieee_Std_Logic_Arith_Mul_Uns_Uns_Slv = 647 + Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Slv = 648 + Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Slv = 649 + Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Slv = 650 + Ieee_Std_Logic_Arith_Add_Uns_Uns_Uns = 651 + Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Sgn = 652 + Ieee_Std_Logic_Arith_Add_Uns_Sgn_Sgn = 653 + Ieee_Std_Logic_Arith_Add_Sgn_Uns_Sgn = 654 + Ieee_Std_Logic_Arith_Add_Uns_Int_Uns = 655 + Ieee_Std_Logic_Arith_Add_Int_Uns_Uns = 656 + Ieee_Std_Logic_Arith_Add_Sgn_Int_Sgn = 657 + Ieee_Std_Logic_Arith_Add_Int_Sgn_Sgn = 658 + Ieee_Std_Logic_Arith_Add_Uns_Log_Uns = 659 + Ieee_Std_Logic_Arith_Add_Log_Uns_Uns = 660 + Ieee_Std_Logic_Arith_Add_Sgn_Log_Sgn = 661 + Ieee_Std_Logic_Arith_Add_Log_Sgn_Sgn = 662 + Ieee_Std_Logic_Arith_Add_Uns_Uns_Slv = 663 + Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Slv = 664 + Ieee_Std_Logic_Arith_Add_Uns_Sgn_Slv = 665 + Ieee_Std_Logic_Arith_Add_Sgn_Uns_Slv = 666 + Ieee_Std_Logic_Arith_Add_Uns_Int_Slv = 667 + Ieee_Std_Logic_Arith_Add_Int_Uns_Slv = 668 + Ieee_Std_Logic_Arith_Add_Sgn_Int_Slv = 669 + Ieee_Std_Logic_Arith_Add_Int_Sgn_Slv = 670 + Ieee_Std_Logic_Arith_Add_Uns_Log_Slv = 671 + Ieee_Std_Logic_Arith_Add_Log_Uns_Slv = 672 + Ieee_Std_Logic_Arith_Add_Sgn_Log_Slv = 673 + Ieee_Std_Logic_Arith_Add_Log_Sgn_Slv = 674 + Ieee_Std_Logic_Arith_Sub_Uns_Uns_Uns = 675 + Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Sgn = 676 + Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Sgn = 677 + Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Sgn = 678 + Ieee_Std_Logic_Arith_Sub_Uns_Int_Uns = 679 + Ieee_Std_Logic_Arith_Sub_Int_Uns_Uns = 680 + Ieee_Std_Logic_Arith_Sub_Sgn_Int_Sgn = 681 + Ieee_Std_Logic_Arith_Sub_Int_Sgn_Sgn = 682 + Ieee_Std_Logic_Arith_Sub_Uns_Log_Uns = 683 + Ieee_Std_Logic_Arith_Sub_Log_Uns_Uns = 684 + Ieee_Std_Logic_Arith_Sub_Sgn_Log_Sgn = 685 + Ieee_Std_Logic_Arith_Sub_Log_Sgn_Sgn = 686 + Ieee_Std_Logic_Arith_Sub_Uns_Uns_Slv = 687 + Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Slv = 688 + Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Slv = 689 + Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Slv = 690 + Ieee_Std_Logic_Arith_Sub_Uns_Int_Slv = 691 + Ieee_Std_Logic_Arith_Sub_Int_Uns_Slv = 692 + Ieee_Std_Logic_Arith_Sub_Sgn_Int_Slv = 693 + Ieee_Std_Logic_Arith_Sub_Int_Sgn_Slv = 694 + Ieee_Std_Logic_Arith_Sub_Uns_Log_Slv = 695 + Ieee_Std_Logic_Arith_Sub_Log_Uns_Slv = 696 + Ieee_Std_Logic_Arith_Sub_Sgn_Log_Slv = 697 + Ieee_Std_Logic_Arith_Sub_Log_Sgn_Slv = 698 + Ieee_Std_Logic_Arith_Lt_Uns_Uns = 699 + Ieee_Std_Logic_Arith_Lt_Sgn_Sgn = 700 + Ieee_Std_Logic_Arith_Lt_Uns_Sgn = 701 + Ieee_Std_Logic_Arith_Lt_Sgn_Uns = 702 + Ieee_Std_Logic_Arith_Lt_Uns_Int = 703 + Ieee_Std_Logic_Arith_Lt_Int_Uns = 704 + Ieee_Std_Logic_Arith_Lt_Sgn_Int = 705 + Ieee_Std_Logic_Arith_Lt_Int_Sgn = 706 + Ieee_Std_Logic_Arith_Le_Uns_Uns = 707 + Ieee_Std_Logic_Arith_Le_Sgn_Sgn = 708 + Ieee_Std_Logic_Arith_Le_Uns_Sgn = 709 + Ieee_Std_Logic_Arith_Le_Sgn_Uns = 710 + Ieee_Std_Logic_Arith_Le_Uns_Int = 711 + Ieee_Std_Logic_Arith_Le_Int_Uns = 712 + Ieee_Std_Logic_Arith_Le_Sgn_Int = 713 + Ieee_Std_Logic_Arith_Le_Int_Sgn = 714 + Ieee_Std_Logic_Arith_Gt_Uns_Uns = 715 + Ieee_Std_Logic_Arith_Gt_Sgn_Sgn = 716 + Ieee_Std_Logic_Arith_Gt_Uns_Sgn = 717 + Ieee_Std_Logic_Arith_Gt_Sgn_Uns = 718 + Ieee_Std_Logic_Arith_Gt_Uns_Int = 719 + Ieee_Std_Logic_Arith_Gt_Int_Uns = 720 + Ieee_Std_Logic_Arith_Gt_Sgn_Int = 721 + Ieee_Std_Logic_Arith_Gt_Int_Sgn = 722 + Ieee_Std_Logic_Arith_Ge_Uns_Uns = 723 + Ieee_Std_Logic_Arith_Ge_Sgn_Sgn = 724 + Ieee_Std_Logic_Arith_Ge_Uns_Sgn = 725 + Ieee_Std_Logic_Arith_Ge_Sgn_Uns = 726 + Ieee_Std_Logic_Arith_Ge_Uns_Int = 727 + Ieee_Std_Logic_Arith_Ge_Int_Uns = 728 + Ieee_Std_Logic_Arith_Ge_Sgn_Int = 729 + Ieee_Std_Logic_Arith_Ge_Int_Sgn = 730 + Ieee_Std_Logic_Arith_Eq_Uns_Uns = 731 + Ieee_Std_Logic_Arith_Eq_Sgn_Sgn = 732 + Ieee_Std_Logic_Arith_Eq_Uns_Sgn = 733 + Ieee_Std_Logic_Arith_Eq_Sgn_Uns = 734 + Ieee_Std_Logic_Arith_Eq_Uns_Int = 735 + Ieee_Std_Logic_Arith_Eq_Int_Uns = 736 + Ieee_Std_Logic_Arith_Eq_Sgn_Int = 737 + Ieee_Std_Logic_Arith_Eq_Int_Sgn = 738 + Ieee_Std_Logic_Arith_Ne_Uns_Uns = 739 + Ieee_Std_Logic_Arith_Ne_Sgn_Sgn = 740 + Ieee_Std_Logic_Arith_Ne_Uns_Sgn = 741 + Ieee_Std_Logic_Arith_Ne_Sgn_Uns = 742 + Ieee_Std_Logic_Arith_Ne_Uns_Int = 743 + Ieee_Std_Logic_Arith_Ne_Int_Uns = 744 + Ieee_Std_Logic_Arith_Ne_Sgn_Int = 745 + Ieee_Std_Logic_Arith_Ne_Int_Sgn = 746 + Ieee_Std_Logic_Misc_And_Reduce_Slv = 747 + Ieee_Std_Logic_Misc_And_Reduce_Suv = 748 + Ieee_Std_Logic_Misc_Nand_Reduce_Slv = 749 + Ieee_Std_Logic_Misc_Nand_Reduce_Suv = 750 + Ieee_Std_Logic_Misc_Or_Reduce_Slv = 751 + Ieee_Std_Logic_Misc_Or_Reduce_Suv = 752 + Ieee_Std_Logic_Misc_Nor_Reduce_Slv = 753 + Ieee_Std_Logic_Misc_Nor_Reduce_Suv = 754 + Ieee_Std_Logic_Misc_Xor_Reduce_Slv = 755 + Ieee_Std_Logic_Misc_Xor_Reduce_Suv = 756 + Ieee_Std_Logic_Misc_Xnor_Reduce_Slv = 757 + Ieee_Std_Logic_Misc_Xnor_Reduce_Suv = 758 @export diff --git a/src/vhdl/vhdl-ieee-std_logic_arith.adb b/src/vhdl/vhdl-ieee-std_logic_arith.adb index 0786f753e..b3f6e9c81 100644 --- a/src/vhdl/vhdl-ieee-std_logic_arith.adb +++ b/src/vhdl/vhdl-ieee-std_logic_arith.adb @@ -50,6 +50,12 @@ package body Vhdl.Ieee.Std_Logic_Arith is Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Int, Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Log); + Conv_Sgn_Patterns : constant Conv_Pattern_Type := + (Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Signed_Sgn, + Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Signed_Uns, + Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Signed_Int, + Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Signed_Log); + Conv_Int_Patterns : constant Conv_Pattern_Type := (Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Sgn, Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Uns, @@ -521,6 +527,8 @@ package body Vhdl.Ieee.Std_Logic_Arith is Def := Handle_Bin (Mul_Patterns); when Name_Conv_Unsigned => Def := Handle_Conv (Conv_Uns_Patterns); + when Name_Conv_Signed => + Def := Handle_Conv (Conv_Sgn_Patterns); when Name_Conv_Std_Logic_Vector => Def := Handle_Conv (Conv_Vec_Patterns); when Name_Op_Less => diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 3d9561662..95676af3e 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -6289,6 +6289,11 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn, Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Log, + Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Signed_Int, + Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Signed_Uns, + Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Signed_Sgn, + Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Signed_Log, + Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Int, Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Uns, Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Sgn, |