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authorTristan Gingold <tgingold@free.fr>2019-05-06 21:58:47 +0200
committerTristan Gingold <tgingold@free.fr>2019-05-06 21:59:40 +0200
commit3a8482652759411ed2dfc837c3cc6f98ae032158 (patch)
treeaf8751eb880333cae65235e7eac62292ae7aa272
parent8bdc2c174fbd6199414301e245b1045c5f40489c (diff)
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vhdl: renames iir_chains to vhdl.nodes_utils. Remove iir_chain_handling.
-rw-r--r--src/vhdl/iir_chain_handling.adb68
-rw-r--r--src/vhdl/iir_chain_handling.ads47
-rw-r--r--src/vhdl/simulate/simul-elaboration.adb2
-rw-r--r--src/vhdl/simulate/simul-execution.adb2
-rw-r--r--src/vhdl/translate/trans-chap7.adb2
-rw-r--r--src/vhdl/translate/trans-chap8.adb4
-rw-r--r--src/vhdl/vhdl-canon.adb23
-rw-r--r--src/vhdl/vhdl-nodes_utils.adb (renamed from src/vhdl/iir_chains.adb)25
-rw-r--r--src/vhdl/vhdl-nodes_utils.ads (renamed from src/vhdl/iir_chains.ads)45
-rw-r--r--src/vhdl/vhdl-parse.adb100
-rw-r--r--src/vhdl/vhdl-sem.adb4
-rw-r--r--src/vhdl/vhdl-sem_assocs.adb2
-rw-r--r--src/vhdl/vhdl-sem_expr.adb4
-rw-r--r--src/vhdl/vhdl-sem_names.adb2
-rw-r--r--src/vhdl/vhdl-sem_specs.adb4
-rw-r--r--src/vhdl/vhdl-sem_utils.adb43
-rw-r--r--src/vhdl/vhdl-std_package.adb12
17 files changed, 134 insertions, 255 deletions
diff --git a/src/vhdl/iir_chain_handling.adb b/src/vhdl/iir_chain_handling.adb
deleted file mode 100644
index 1e70a366a..000000000
--- a/src/vhdl/iir_chain_handling.adb
+++ /dev/null
@@ -1,68 +0,0 @@
--- Generic package to handle chains.
--- Copyright (C) 2002, 2003, 2004, 2005 Tristan Gingold
---
--- GHDL is free software; you can redistribute it and/or modify it under
--- the terms of the GNU General Public License as published by the Free
--- Software Foundation; either version 2, or (at your option) any later
--- version.
---
--- GHDL is distributed in the hope that it will be useful, but WITHOUT ANY
--- WARRANTY; without even the implied warranty of MERCHANTABILITY or
--- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
--- for more details.
---
--- You should have received a copy of the GNU General Public License
--- along with GHDL; see the file COPYING. If not, write to the Free
--- Software Foundation, 59 Temple Place - Suite 330, Boston, MA
--- 02111-1307, USA.
-package body Iir_Chain_Handling is
- procedure Build_Init (Last : out Iir) is
- begin
- Last := Null_Iir;
- end Build_Init;
-
- procedure Build_Init (Last : out Iir; Parent : Iir)
- is
- El : Iir;
- begin
- El := Get_Chain_Start (Parent);
- if El /= Null_Iir then
- loop
- Last := El;
- El := Get_Chain (El);
- exit when El = Null_Iir;
- end loop;
- else
- Last := Null_Iir;
- end if;
- end Build_Init;
-
- procedure Append (Last : in out Iir; Parent : Iir; El : Iir) is
- begin
- if Last = Null_Iir then
- Set_Chain_Start (Parent, El);
- else
- Set_Chain (Last, El);
- end if;
- Last := El;
- end Append;
-
- procedure Append_Subchain (Last : in out Iir; Parent : Iir; Els : Iir)
- is
- El : Iir;
- begin
- if Last = Null_Iir then
- Set_Chain_Start (Parent, Els);
- else
- Set_Chain (Last, Els);
- end if;
- El := Els;
- loop
- Set_Parent (El, Parent);
- Last := El;
- El := Get_Chain (El);
- exit when El = Null_Iir;
- end loop;
- end Append_Subchain;
-end Iir_Chain_Handling;
-
diff --git a/src/vhdl/iir_chain_handling.ads b/src/vhdl/iir_chain_handling.ads
deleted file mode 100644
index ea17ac98a..000000000
--- a/src/vhdl/iir_chain_handling.ads
+++ /dev/null
@@ -1,47 +0,0 @@
--- Generic package to handle chains.
--- Copyright (C) 2002, 2003, 2004, 2005 Tristan Gingold
---
--- GHDL is free software; you can redistribute it and/or modify it under
--- the terms of the GNU General Public License as published by the Free
--- Software Foundation; either version 2, or (at your option) any later
--- version.
---
--- GHDL is distributed in the hope that it will be useful, but WITHOUT ANY
--- WARRANTY; without even the implied warranty of MERCHANTABILITY or
--- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
--- for more details.
---
--- You should have received a copy of the GNU General Public License
--- along with GHDL; see the file COPYING. If not, write to the Free
--- Software Foundation, 59 Temple Place - Suite 330, Boston, MA
--- 02111-1307, USA.
-with Vhdl.Nodes; use Vhdl.Nodes;
-
--- The generic package Chain_Handling can be used to build or modify
--- chains.
--- The formals are the subprograms to get and set the first element
--- from the parent.
-generic
- with function Get_Chain_Start (Parent : Iir) return Iir;
- with procedure Set_Chain_Start (Parent : Iir; First : Iir);
-package Iir_Chain_Handling is
-
- -- Building a chain:
- -- Initialize (set LAST to NULL_IIR).
- procedure Build_Init (Last : out Iir);
- -- Set LAST with the last element of the chain.
- -- This is an initialization for an already built chain.
- procedure Build_Init (Last : out Iir; Parent : Iir);
-
- -- Append element EL to the chain, whose parent is PARENT and last
- -- element LAST.
- procedure Append (Last : in out Iir; Parent : Iir; El : Iir);
-
- -- Append a subchain whose first element is ELS to a chain, whose
- -- parent is PARENT and last element LAST.
- -- The Parent field of each elements of Els is set to PARENT.
- -- Note: the Append procedure declared just above is an optimization
- -- of this subprogram if ELS has no next element. However, the
- -- above subprogram does not set the Parent field of EL.
- procedure Append_Subchain (Last : in out Iir; Parent : Iir; Els : Iir);
-end Iir_Chain_Handling;
diff --git a/src/vhdl/simulate/simul-elaboration.adb b/src/vhdl/simulate/simul-elaboration.adb
index da8c15664..862d5d34c 100644
--- a/src/vhdl/simulate/simul-elaboration.adb
+++ b/src/vhdl/simulate/simul-elaboration.adb
@@ -25,7 +25,7 @@ with Vhdl.Utils; use Vhdl.Utils;
with Libraries;
with Name_Table;
with Simul.File_Operation;
-with Iir_Chains; use Iir_Chains;
+with Vhdl.Nodes_Utils; use Vhdl.Nodes_Utils;
with Vhdl.Sem_Lib; use Vhdl.Sem_Lib;
with Simul.Annotations; use Simul.Annotations;
with Simul.Elaboration.AMS; use Simul.Elaboration.AMS;
diff --git a/src/vhdl/simulate/simul-execution.adb b/src/vhdl/simulate/simul-execution.adb
index b820e6425..19f9286b0 100644
--- a/src/vhdl/simulate/simul-execution.adb
+++ b/src/vhdl/simulate/simul-execution.adb
@@ -32,7 +32,7 @@ with Simul.Debugger; use Simul.Debugger;
with Std_Names;
with Str_Table;
with Files_Map;
-with Iir_Chains; use Iir_Chains;
+with Vhdl.Nodes_Utils; use Vhdl.Nodes_Utils;
with Simul.Simulation; use Simul.Simulation;
with Grt.Astdio.Vhdl;
with Grt.Stdio;
diff --git a/src/vhdl/translate/trans-chap7.adb b/src/vhdl/translate/trans-chap7.adb
index 85b74416e..347281d3a 100644
--- a/src/vhdl/translate/trans-chap7.adb
+++ b/src/vhdl/translate/trans-chap7.adb
@@ -20,7 +20,7 @@ with Ada.Text_IO;
with Name_Table;
with Str_Table;
with Vhdl.Utils; use Vhdl.Utils;
-with Iir_Chains; use Iir_Chains;
+with Vhdl.Nodes_Utils; use Vhdl.Nodes_Utils;
with Vhdl.Std_Package; use Vhdl.Std_Package;
with Errorout; use Errorout;
with Flags; use Flags;
diff --git a/src/vhdl/translate/trans-chap8.adb b/src/vhdl/translate/trans-chap8.adb
index 59bbca656..34adc93c6 100644
--- a/src/vhdl/translate/trans-chap8.adb
+++ b/src/vhdl/translate/trans-chap8.adb
@@ -19,7 +19,7 @@
with Ada.Text_IO;
with Std_Names;
with Errorout; use Errorout;
-with Iir_Chains;
+with Vhdl.Nodes_Utils;
with Vhdl.Canon;
with Vhdl.Evaluation; use Vhdl.Evaluation;
with Vhdl.Std_Package; use Vhdl.Std_Package;
@@ -2656,7 +2656,7 @@ package body Trans.Chap8 is
type Mnode_Array is array (Natural range <>) of Mnode;
type O_Enode_Array is array (Natural range <>) of O_Enode;
Nbr_Assoc : constant Natural :=
- Iir_Chains.Get_Chain_Length (Assoc_Chain);
+ Vhdl.Nodes_Utils.Get_Chain_Length (Assoc_Chain);
-- References to the formals (for copy-out), and variables for whole
-- actual of individual associations.
diff --git a/src/vhdl/vhdl-canon.adb b/src/vhdl/vhdl-canon.adb
index 379adaed6..99db770ae 100644
--- a/src/vhdl/vhdl-canon.adb
+++ b/src/vhdl/vhdl-canon.adb
@@ -23,7 +23,7 @@ with Name_Table;
with Vhdl.Sem;
with Vhdl.Sem_Inst;
with Vhdl.Sem_Specs;
-with Iir_Chains; use Iir_Chains;
+with Vhdl.Nodes_Utils; use Vhdl.Nodes_Utils;
with PSL.Nodes;
with PSL.Rewrites;
with PSL.Build;
@@ -2888,13 +2888,13 @@ package body Vhdl.Canon is
procedure Canon_Block_Configuration (Top : Iir_Design_Unit;
Conf : Iir_Block_Configuration)
is
- use Iir_Chains.Configuration_Item_Chain_Handling;
+ -- use Iir_Chains.Configuration_Item_Chain_Handling;
Spec : constant Iir := Get_Block_Specification (Conf);
Blk : constant Iir := Get_Block_From_Block_Specification (Spec);
Stmts : constant Iir := Get_Concurrent_Statement_Chain (Blk);
El : Iir;
Sub_Blk : Iir;
- Last_Item : Iir;
+ First_Item, Last_Item : Iir;
procedure Create_Default_Block_Configuration (Targ : Iir)
is
@@ -2913,7 +2913,7 @@ package body Vhdl.Canon is
Spec := El;
end if;
Set_Block_Specification (Res, Spec);
- Append (Last_Item, Conf, Res);
+ Sub_Chain_Append (First_Item, Last_Item, Res);
end Create_Default_Block_Configuration;
begin
-- Note: the only allowed declarations are use clauses, which are not
@@ -2923,8 +2923,6 @@ package body Vhdl.Canon is
Clear_Instantiation_Configuration (Blk, False);
- Build_Init (Last_Item, Conf);
-
-- 1) Configure instantiations with configuration specifications.
-- TODO: merge.
El := Get_Declaration_Chain (Blk);
@@ -2939,7 +2937,8 @@ package body Vhdl.Canon is
-- 2) Configure instantations with component configurations,
-- and map block configurations with block/generate statements.
- El := Get_Configuration_Item_Chain (Conf);
+ First_Item := Get_Configuration_Item_Chain (Conf);
+ El := First_Item;
while El /= Null_Iir loop
case Get_Kind (El) is
when Iir_Kind_Configuration_Specification =>
@@ -2970,6 +2969,7 @@ package body Vhdl.Canon is
when others =>
Error_Kind ("canon_block_configuration(1)", El);
end case;
+ Last_Item := El;
El := Get_Chain (El);
end loop;
@@ -3005,7 +3005,7 @@ package body Vhdl.Canon is
(Designator_List, Build_Simple_Name (El, El));
Set_Instantiation_List
(Res, List_To_Flist (Designator_List));
- Append (Last_Item, Conf, Res);
+ Sub_Chain_Append (First_Item, Last_Item, Res);
end if;
elsif Get_Kind (Comp_Conf)
= Iir_Kind_Configuration_Specification
@@ -3038,7 +3038,7 @@ package body Vhdl.Canon is
Set_Binding_Indication
(Res, Get_Binding_Indication (Comp_Conf));
Set_Is_Ref (Res, True);
- Append (Last_Item, Conf, Res);
+ Sub_Chain_Append (First_Item, Last_Item, Res);
end if;
end;
when Iir_Kind_Block_Statement =>
@@ -3106,7 +3106,7 @@ package body Vhdl.Canon is
Set_Base_Name (Blk_Spec, El);
Set_Prefix (Blk_Spec, Build_Simple_Name (Bod, Res));
Set_Block_Specification (Res, Blk_Spec);
- Append (Last_Item, Conf, Res);
+ Sub_Chain_Append (First_Item, Last_Item, Res);
end if;
end if;
end;
@@ -3123,9 +3123,10 @@ package body Vhdl.Canon is
end case;
El := Get_Chain (El);
end loop;
+ Set_Configuration_Item_Chain (Conf, First_Item);
-- 4) Canon component configuration and block configuration (recursion).
- El := Get_Configuration_Item_Chain (Conf);
+ El := First_Item;
while El /= Null_Iir loop
case Get_Kind (El) is
when Iir_Kind_Block_Configuration =>
diff --git a/src/vhdl/iir_chains.adb b/src/vhdl/vhdl-nodes_utils.adb
index ca2593bd7..236956a8c 100644
--- a/src/vhdl/iir_chains.adb
+++ b/src/vhdl/vhdl-nodes_utils.adb
@@ -15,7 +15,8 @@
-- along with GHDL; see the file COPYING. If not, write to the Free
-- Software Foundation, 59 Temple Place - Suite 330, Boston, MA
-- 02111-1307, USA.
-package body Iir_Chains is
+
+package body Vhdl.Nodes_Utils is
function Get_Chain_Length (First : Iir) return Natural
is
Res : Natural := 0;
@@ -79,6 +80,26 @@ package body Iir_Chains is
Last := Last_Sub;
end Sub_Chain_Append_Chain;
+ procedure Sub_Chain_Append_Subchain (First, Last : in out Iir;
+ Sub : Iir)
+ is
+ N : Iir;
+ begin
+ pragma Assert (Sub /= Null_Iir);
+ if First = Null_Iir then
+ First := Sub;
+ else
+ Set_Chain (Last, Sub);
+ end if;
+
+ -- Update last.
+ N := Sub;
+ while N /= Null_Iir loop
+ Last := N;
+ N := Get_Chain (N);
+ end loop;
+ end Sub_Chain_Append_Subchain;
+
function Is_Chain_Length_One (Chain : Iir) return Boolean is
begin
return Chain /= Null_Iir and then Get_Chain (Chain) = Null_Iir;
@@ -96,4 +117,4 @@ package body Iir_Chains is
Set_Chain (Last, El);
Last := El;
end Insert_Incr;
-end Iir_Chains;
+end Vhdl.Nodes_Utils;
diff --git a/src/vhdl/iir_chains.ads b/src/vhdl/vhdl-nodes_utils.ads
index f443341ab..ef71e504b 100644
--- a/src/vhdl/iir_chains.ads
+++ b/src/vhdl/vhdl-nodes_utils.ads
@@ -16,11 +16,9 @@
-- Software Foundation, 59 Temple Place - Suite 330, Boston, MA
-- 02111-1307, USA.
with Vhdl.Nodes; use Vhdl.Nodes;
-with Iir_Chain_Handling;
-pragma Elaborate_All (Iir_Chain_Handling);
with Vhdl.Nodes_Meta;
-package Iir_Chains is
+package Vhdl.Nodes_Utils is
-- Chains are simply linked list of iirs.
-- Elements of the chain are ordered.
-- Each element of a chain have a Chain field, which points to the next
@@ -43,43 +41,6 @@ package Iir_Chains is
-- have to be appended. Indeed, there is no direct access to the last
-- element of a chain.
-- An efficient way to build a chain is to keep the last element of it.
- -- See Iir_Chain_Handling package.
-
- package Declaration_Chain_Handling is new Iir_Chain_Handling
- (Get_Chain_Start => Get_Declaration_Chain,
- Set_Chain_Start => Set_Declaration_Chain);
-
- package Interface_Declaration_Chain_Handling is new Iir_Chain_Handling
- (Get_Chain_Start => Get_Interface_Declaration_Chain,
- Set_Chain_Start => Set_Interface_Declaration_Chain);
-
- package Context_Items_Chain_Handling is new Iir_Chain_Handling
- (Get_Chain_Start => Get_Context_Items,
- Set_Chain_Start => Set_Context_Items);
-
- package Unit_Chain_Handling is new Iir_Chain_Handling
- (Get_Chain_Start => Get_Unit_Chain,
- Set_Chain_Start => Set_Unit_Chain);
-
- package Configuration_Item_Chain_Handling is new Iir_Chain_Handling
- (Get_Chain_Start => Get_Configuration_Item_Chain,
- Set_Chain_Start => Set_Configuration_Item_Chain);
-
- package Entity_Class_Entry_Chain_Handling is new Iir_Chain_Handling
- (Get_Chain_Start => Get_Entity_Class_Entry_Chain,
- Set_Chain_Start => Set_Entity_Class_Entry_Chain);
-
- package Selected_Waveform_Chain_Handling is new Iir_Chain_Handling
- (Get_Chain_Start => Get_Selected_Waveform_Chain,
- Set_Chain_Start => Set_Selected_Waveform_Chain);
-
- package Association_Choices_Chain_Handling is new Iir_Chain_Handling
- (Get_Chain_Start => Get_Association_Choices_Chain,
- Set_Chain_Start => Set_Association_Choices_Chain);
-
- package Case_Statement_Alternative_Chain_Handling is new Iir_Chain_Handling
- (Get_Chain_Start => Get_Case_Statement_Alternative_Chain,
- Set_Chain_Start => Set_Case_Statement_Alternative_Chain);
-- Return the number of elements in a chain starting with FIRST.
-- Not very efficient since O(N).
@@ -105,6 +66,8 @@ package Iir_Chains is
-- Null_Iir.
procedure Sub_Chain_Append_Chain (First, Last : in out Iir;
First_Sub, Last_Sub : Iir);
+ procedure Sub_Chain_Append_Subchain (First, Last : in out Iir;
+ Sub : Iir);
-- Return TRUE iff CHAIN is of length one, ie CHAIN is not NULL_IIR
-- and chain (CHAIN) is NULL_IIR.
@@ -116,4 +79,4 @@ package Iir_Chains is
-- Insert EL after LAST and set LAST to EL.
procedure Insert_Incr (Last : in out Iir; El : Iir);
-end Iir_Chains;
+end Vhdl.Nodes_Utils;
diff --git a/src/vhdl/vhdl-parse.adb b/src/vhdl/vhdl-parse.adb
index dfd98c400..073fe65d3 100644
--- a/src/vhdl/vhdl-parse.adb
+++ b/src/vhdl/vhdl-parse.adb
@@ -15,7 +15,7 @@
-- along with GHDL; see the file COPYING. If not, write to the Free
-- Software Foundation, 59 Temple Place - Suite 330, Boston, MA
-- 02111-1307, USA.
-with Iir_Chains; use Iir_Chains;
+with Vhdl.Nodes_Utils; use Vhdl.Nodes_Utils;
with Vhdl.Tokens; use Vhdl.Tokens;
with Vhdl.Scanner; use Vhdl.Scanner;
with Vhdl.Utils; use Vhdl.Utils;
@@ -2396,7 +2396,6 @@ package body Vhdl.Parse is
function Parse_Physical_Type_Definition (Parent : Iir)
return Iir_Physical_Type_Definition
is
- use Iir_Chains.Unit_Chain_Handling;
Res: Iir_Physical_Type_Definition;
Unit: Iir_Unit_Declaration;
Last : Iir_Unit_Declaration;
@@ -2416,8 +2415,8 @@ package body Vhdl.Parse is
Scan_Semi_Colon ("primary physical unit");
- Build_Init (Last);
- Append (Last, Res, Unit);
+ Set_Unit_Chain (Res, Unit);
+ Last := Unit;
-- Parse secondary units.
while Current_Token = Tok_Identifier loop
@@ -2457,7 +2456,9 @@ package body Vhdl.Parse is
Skip_Until_Semi_Colon;
end case;
end if;
- Append (Last, Res, Unit);
+ Set_Chain (Last, Unit);
+ Last := Unit;
+
Scan_Semi_Colon ("secondary physical unit");
end loop;
@@ -4200,10 +4201,9 @@ package body Vhdl.Parse is
case Current_Token is
when Tok_Is =>
declare
- use Iir_Chains.Entity_Class_Entry_Chain_Handling;
Res : Iir_Group_Template_Declaration;
El : Iir_Entity_Class;
- Last : Iir_Entity_Class;
+ First, Last : Iir_Entity_Class;
begin
Res := Create_Iir (Iir_Kind_Group_Template_Declaration);
Set_Location (Res, Loc);
@@ -4215,14 +4215,14 @@ package body Vhdl.Parse is
-- Skip '('.
Expect_Scan (Tok_Left_Paren);
- Build_Init (Last);
+ Sub_Chain_Init (First, Last);
loop
- Append (Last, Res, Parse_Entity_Class_Entry);
+ Sub_Chain_Append (First, Last, Parse_Entity_Class_Entry);
if Current_Token = Tok_Box then
El := Create_Iir (Iir_Kind_Entity_Class);
Set_Location (El);
Set_Entity_Class (El, Tok_Box);
- Append (Last, Res, El);
+ Sub_Chain_Append (First, Last, El);
-- Skip '<>'.
Scan;
@@ -4238,6 +4238,7 @@ package body Vhdl.Parse is
-- Skip ','.
Scan;
end loop;
+ Set_Entity_Class_Entry_Chain (Res, First);
-- Skip ')' ';'
Expect_Scan (Tok_Right_Paren);
@@ -4664,8 +4665,7 @@ package body Vhdl.Parse is
-- architecture_body and generate_statement)
procedure Parse_Declarative_Part (Parent : Iir)
is
- use Declaration_Chain_Handling;
- Last_Decl : Iir;
+ First_Decl, Last_Decl : Iir;
Decl : Iir;
Package_Parent_Cache : Iir;
@@ -4678,7 +4678,7 @@ package body Vhdl.Parse is
end Package_Parent;
begin
Package_Parent_Cache := Null_Iir;
- Build_Init (Last_Decl);
+ Sub_Chain_Init (First_Decl, Last_Decl);
loop
Decl := Null_Iir;
case Current_Token is
@@ -4966,10 +4966,18 @@ package body Vhdl.Parse is
when others =>
exit;
end case;
- if Decl /= Null_Iir then
- Append_Subchain (Last_Decl, Parent, Decl);
- end if;
+ while Decl /= Null_Iir loop
+ Set_Parent (Decl, Parent);
+ if First_Decl = Null_Iir then
+ First_Decl := Decl;
+ else
+ Set_Chain (Last_Decl, Decl);
+ end if;
+ Last_Decl := Decl;
+ Decl := Get_Chain (Decl);
+ end loop;
end loop;
+ Set_Declaration_Chain (Parent, First_Decl);
end Parse_Declarative_Part;
-- precond : ENTITY
@@ -5153,10 +5161,9 @@ package body Vhdl.Parse is
-- element_association ::= [ choices => ] expression
function Parse_Aggregate return Iir
is
- use Iir_Chains.Association_Choices_Chain_Handling;
Expr: Iir;
Res: Iir;
- Last : Iir;
+ First, Last : Iir;
Assoc: Iir;
Loc, Right_Loc : Location_Type;
begin
@@ -5221,7 +5228,7 @@ package body Vhdl.Parse is
end if;
Res := Create_Iir (Iir_Kind_Aggregate);
Set_Location (Res, Loc);
- Build_Init (Last);
+ Sub_Chain_Init (First, Last);
loop
if Current_Token = Tok_Others then
Assoc := Parse_A_Choice (Null_Iir, Loc);
@@ -5256,7 +5263,7 @@ package body Vhdl.Parse is
end case;
end if;
Set_Associated_Expr (Assoc, Expr);
- Append_Subchain (Last, Res, Assoc);
+ Sub_Chain_Append_Subchain (First, Last, Assoc);
exit when Current_Token /= Tok_Comma;
Loc := Get_Token_Location;
@@ -5266,6 +5273,7 @@ package body Vhdl.Parse is
Expr := Null_Iir;
end loop;
+ Set_Association_Choices_Chain (Res, First);
-- Eat ')'.
Expect_Scan (Tok_Right_Paren);
@@ -6181,12 +6189,11 @@ package body Vhdl.Parse is
-- waveform WHEN choices
function Parse_Selected_Signal_Assignment return Iir
is
- use Iir_Chains.Selected_Waveform_Chain_Handling;
Res : Iir;
Assoc : Iir;
Wf_Chain : Iir_Waveform_Element;
Target : Iir;
- Last : Iir;
+ First, Last : Iir;
When_Loc : Location_Type;
begin
-- Skip 'with'.
@@ -6208,7 +6215,7 @@ package body Vhdl.Parse is
Parse_Options (Res);
- Build_Init (Last);
+ Sub_Chain_Init (First, Last);
loop
Wf_Chain := Parse_Waveform;
Expect (Tok_When, "'when' expected after waveform");
@@ -6219,11 +6226,12 @@ package body Vhdl.Parse is
Parse_Choices (Null_Iir, When_Loc, Assoc);
Set_Associated_Chain (Assoc, Wf_Chain);
- Append_Subchain (Last, Res, Assoc);
+ Sub_Chain_Append_Subchain (First, Last, Assoc);
exit when Current_Token /= Tok_Comma;
-- Skip ','.
Scan;
end loop;
+ Set_Selected_Waveform_Chain (Res, First);
Expect_Scan (Tok_Semi_Colon, "';' expected at end of signal assignment");
@@ -6768,10 +6776,9 @@ package body Vhdl.Parse is
-- case_statement_alternative ::= WHEN choices => sequence_of_statements
function Parse_Case_Statement (Label : Name_Id) return Iir
is
- use Iir_Chains.Case_Statement_Alternative_Chain_Handling;
Stmt : Iir;
Assoc: Iir;
- Last_Assoc : Iir;
+ First_Assoc, Last_Assoc : Iir;
When_Loc : Location_Type;
begin
Stmt := Create_Iir (Iir_Kind_Case_Statement);
@@ -6791,7 +6798,7 @@ package body Vhdl.Parse is
Error_Msg_Parse ("missing alternative in case statement");
end if;
- Build_Init (Last_Assoc);
+ Sub_Chain_Init (First_Assoc, Last_Assoc);
while Current_Token = Tok_When loop
When_Loc := Get_Token_Location;
@@ -6804,8 +6811,9 @@ package body Vhdl.Parse is
Expect_Scan (Tok_Double_Arrow);
Set_Associated_Chain (Assoc, Parse_Sequential_Statements (Stmt));
- Append_Subchain (Last_Assoc, Stmt, Assoc);
+ Sub_Chain_Append_Subchain (First_Assoc, Last_Assoc, Assoc);
end loop;
+ Set_Case_Statement_Alternative_Chain (Stmt, First_Assoc);
if Flag_Elocations then
Create_Elocations (Stmt);
@@ -9145,26 +9153,26 @@ package body Vhdl.Parse is
-- Parse use clauses.
if Current_Token = Tok_Use then
declare
- Last : Iir;
- use Declaration_Chain_Handling;
+ First, Last : Iir;
begin
- Build_Init (Last);
+ Sub_Chain_Init (First, Last);
while Current_Token = Tok_Use loop
- Append_Subchain (Last, Res, Parse_Use_Clause);
+ Sub_Chain_Append_Subchain (First, Last, Parse_Use_Clause);
end loop;
+ Set_Declaration_Chain (Res, First);
end;
end if;
-- Parse configuration item list
declare
- use Iir_Chains.Configuration_Item_Chain_Handling;
- Last : Iir;
+ First, Last : Iir;
begin
- Build_Init (Last);
+ Sub_Chain_Init (First, Last);
while Current_Token = Tok_For loop
- Append (Last, Res, Parse_Configuration_Item);
+ Sub_Chain_Append (First, Last, Parse_Configuration_Item);
end loop;
+ Set_Configuration_Item_Chain (Res, First);
end;
Expect_Scan (Tok_End);
Expect_Scan (Tok_For);
@@ -9279,17 +9287,16 @@ package body Vhdl.Parse is
-- FIXME: attribute_specification, group_declaration
procedure Parse_Configuration_Declarative_Part (Parent : Iir)
is
- use Declaration_Chain_Handling;
- Last : Iir;
+ First, Last : Iir;
El : Iir;
begin
- Build_Init (Last);
+ Sub_Chain_Init (First, Last);
loop
case Current_Token is
when Tok_Invalid =>
raise Internal_Error;
when Tok_Use =>
- Append_Subchain (Last, Parent, Parse_Use_Clause);
+ Sub_Chain_Append_Subchain (First, Last, Parse_Use_Clause);
when Tok_Attribute =>
El := Parse_Attribute;
if El /= Null_Iir then
@@ -9297,7 +9304,7 @@ package body Vhdl.Parse is
Error_Msg_Parse
("attribute declaration not allowed here");
end if;
- Append (Last, Parent, El);
+ Sub_Chain_Append (First, Last, El);
end if;
when Tok_Group =>
El := Parse_Group;
@@ -9306,12 +9313,13 @@ package body Vhdl.Parse is
Error_Msg_Parse
("group template declaration not allowed here");
end if;
- Append (Last, Parent, El);
+ Sub_Chain_Append (First, Last, El);
end if;
when others =>
exit;
end case;
end loop;
+ Set_Declaration_Chain (Parent, First);
end Parse_Configuration_Declarative_Part;
-- precond : CONFIGURATION
@@ -9622,11 +9630,10 @@ package body Vhdl.Parse is
-- context_item ::= library_clause | use_clause | context_reference
procedure Parse_Context_Clause (Unit : Iir)
is
- use Context_Items_Chain_Handling;
- Last : Iir;
+ First, Last : Iir;
Els : Iir;
begin
- Build_Init (Last);
+ Sub_Chain_Init (First, Last);
loop
case Current_Token is
@@ -9659,8 +9666,9 @@ package body Vhdl.Parse is
when others =>
exit;
end case;
- Append_Subchain (Last, Unit, Els);
+ Sub_Chain_Append_Subchain (First, Last, Els);
end loop;
+ Set_Context_Items (Unit, First);
end Parse_Context_Clause;
-- Precond: IS
diff --git a/src/vhdl/vhdl-sem.adb b/src/vhdl/vhdl-sem.adb
index 077d9c5f6..62ab6b653 100644
--- a/src/vhdl/vhdl-sem.adb
+++ b/src/vhdl/vhdl-sem.adb
@@ -33,7 +33,7 @@ with Flags; use Flags;
with Str_Table;
with Vhdl.Sem_Utils;
with Vhdl.Sem_Stmts; use Vhdl.Sem_Stmts;
-with Iir_Chains;
+with Vhdl.Nodes_Utils;
with Vhdl.Xrefs; use Vhdl.Xrefs;
package body Vhdl.Sem is
@@ -1710,7 +1710,7 @@ package body Vhdl.Sem is
Nbr_Interfaces : Natural;
Is_Method : Boolean;
begin
- Nbr_Interfaces := Iir_Chains.Get_Chain_Length
+ Nbr_Interfaces := Vhdl.Nodes_Utils.Get_Chain_Length
(Get_Interface_Declaration_Chain (Subprg));
-- For vhdl-02, the protected variable is an implicit parameter.
diff --git a/src/vhdl/vhdl-sem_assocs.adb b/src/vhdl/vhdl-sem_assocs.adb
index 6a9226fe0..41b97953e 100644
--- a/src/vhdl/vhdl-sem_assocs.adb
+++ b/src/vhdl/vhdl-sem_assocs.adb
@@ -27,7 +27,7 @@ with Vhdl.Sem_Types;
with Vhdl.Sem_Decls;
with Vhdl.Std_Package;
with Vhdl.Sem_Scopes;
-with Iir_Chains; use Iir_Chains;
+with Vhdl.Nodes_Utils; use Vhdl.Nodes_Utils;
with Vhdl.Xrefs;
package body Vhdl.Sem_Assocs is
diff --git a/src/vhdl/vhdl-sem_expr.adb b/src/vhdl/vhdl-sem_expr.adb
index 096cd8961..151d2d54c 100644
--- a/src/vhdl/vhdl-sem_expr.adb
+++ b/src/vhdl/vhdl-sem_expr.adb
@@ -27,7 +27,7 @@ with Name_Table;
with Str_Table;
with Vhdl.Utils; use Vhdl.Utils;
with Vhdl.Evaluation; use Vhdl.Evaluation;
-with Iir_Chains; use Iir_Chains;
+with Vhdl.Nodes_Utils; use Vhdl.Nodes_Utils;
with Vhdl.Sem_Types;
with Vhdl.Sem_Stmts; use Vhdl.Sem_Stmts;
with Vhdl.Sem_Assocs; use Vhdl.Sem_Assocs;
@@ -1829,7 +1829,7 @@ package body Vhdl.Sem_Expr is
--
-- GHDL: So even in presence of default expression in a parameter,
-- a unary operation has to match with a binary operator.
- if Iir_Chains.Get_Chain_Length (Interface_Chain) /= Arity then
+ if Get_Chain_Length (Interface_Chain) /= Arity then
goto Continue;
end if;
diff --git a/src/vhdl/vhdl-sem_names.adb b/src/vhdl/vhdl-sem_names.adb
index 8cf89d02a..07773341b 100644
--- a/src/vhdl/vhdl-sem_names.adb
+++ b/src/vhdl/vhdl-sem_names.adb
@@ -22,7 +22,7 @@ with Flags; use Flags;
with Name_Table;
with Vhdl.Std_Package; use Vhdl.Std_Package;
with Types; use Types;
-with Iir_Chains; use Iir_Chains;
+with Vhdl.Nodes_Utils; use Vhdl.Nodes_Utils;
with Std_Names;
with Vhdl.Sem;
with Vhdl.Sem_Lib; use Vhdl.Sem_Lib;
diff --git a/src/vhdl/vhdl-sem_specs.adb b/src/vhdl/vhdl-sem_specs.adb
index 6bf56aed5..5b63995bc 100644
--- a/src/vhdl/vhdl-sem_specs.adb
+++ b/src/vhdl/vhdl-sem_specs.adb
@@ -26,7 +26,7 @@ with Vhdl.Sem_Lib; use Vhdl.Sem_Lib;
with Vhdl.Sem_Scopes; use Vhdl.Sem_Scopes;
with Vhdl.Sem_Assocs; use Vhdl.Sem_Assocs;
with Libraries;
-with Iir_Chains; use Iir_Chains;
+with Vhdl.Nodes_Utils; use Vhdl.Nodes_Utils;
with Flags; use Flags;
with Std_Names;
with Vhdl.Sem_Decls;
@@ -1735,7 +1735,7 @@ package body Vhdl.Sem_Specs is
Sub_Chain_Append (Res, Last, Assoc);
Ent_El := Get_Chain (Ent_El);
end loop;
- if Iir_Chains.Get_Chain_Length (Comp_Chain) /= Found then
+ if Nodes_Utils.Get_Chain_Length (Comp_Chain) /= Found then
-- At least one component generic/port cannot be associated with
-- the entity one.
diff --git a/src/vhdl/vhdl-sem_utils.adb b/src/vhdl/vhdl-sem_utils.adb
index 0f3045bdf..65ffda3c0 100644
--- a/src/vhdl/vhdl-sem_utils.adb
+++ b/src/vhdl/vhdl-sem_utils.adb
@@ -19,8 +19,8 @@ with Ada.Unchecked_Conversion;
with Types; use Types;
with Flags; use Flags;
with Errorout; use Errorout;
+with Vhdl.Nodes_Utils; use Vhdl.Nodes_Utils;
with Vhdl.Utils; use Vhdl.Utils;
-with Iir_Chains; use Iir_Chains;
with Vhdl.Ieee.Std_Logic_1164;
with Std_Names;
with Vhdl.Std_Package; use Vhdl.Std_Package;
@@ -128,7 +128,6 @@ package body Vhdl.Sem_Utils is
procedure Create_Implicit_File_Primitives
(Decl : Iir_Type_Declaration; Type_Definition : Iir_File_Type_Definition)
is
- use Iir_Chains.Interface_Declaration_Chain_Handling;
Type_Mark : constant Iir := Get_File_Type_Mark (Type_Definition);
Type_Mark_Type : constant Iir := Get_Type (Type_Mark);
Proc: Iir_Procedure_Declaration;
@@ -136,7 +135,7 @@ package body Vhdl.Sem_Utils is
Inter: Iir;
Loc : Location_Type;
File_Interface_Kind : Iir_Kind;
- Last_Interface : Iir;
+ First_Interface, Last_Interface : Iir;
Last : Iir;
begin
Last := Decl;
@@ -152,7 +151,7 @@ package body Vhdl.Sem_Utils is
Set_Identifier (Proc, Std_Names.Name_File_Open);
Set_Visible_Flag (Proc, True);
Set_Wait_State (Proc, False);
- Build_Init (Last_Interface);
+ Sub_Chain_Init (First_Interface, Last_Interface);
case I is
when 1 =>
Set_Implicit_Definition (Proc, Iir_Predefined_File_Open);
@@ -168,7 +167,7 @@ package body Vhdl.Sem_Utils is
Std_Package.File_Open_Status_Type_Definition);
Set_Mode (Inter, Iir_Out_Mode);
Set_Visible_Flag (Inter, True);
- Append (Last_Interface, Proc, Inter);
+ Sub_Chain_Append (First_Interface, Last_Interface, Inter);
end case;
-- File F : FT
Inter := Create_Iir (Iir_Kind_Interface_File_Declaration);
@@ -177,7 +176,7 @@ package body Vhdl.Sem_Utils is
Set_Type (Inter, Type_Definition);
Set_Mode (Inter, Iir_Inout_Mode);
Set_Visible_Flag (Inter, True);
- Append (Last_Interface, Proc, Inter);
+ Sub_Chain_Append (First_Interface, Last_Interface, Inter);
-- External_Name : in STRING
Inter := Create_Iir (Iir_Kind_Interface_Constant_Declaration);
Set_Location (Inter, Loc);
@@ -185,7 +184,7 @@ package body Vhdl.Sem_Utils is
Set_Type (Inter, Std_Package.String_Type_Definition);
Set_Mode (Inter, Iir_In_Mode);
Set_Visible_Flag (Inter, True);
- Append (Last_Interface, Proc, Inter);
+ Sub_Chain_Append (First_Interface, Last_Interface, Inter);
-- Open_Kind : in File_Open_Kind := Read_Mode.
Inter := Create_Iir (Iir_Kind_Interface_Constant_Declaration);
Set_Location (Inter, Loc);
@@ -196,7 +195,8 @@ package body Vhdl.Sem_Utils is
(Inter,
Build_Simple_Name (Std_Package.File_Open_Kind_Read_Mode, Loc));
Set_Visible_Flag (Inter, True);
- Append (Last_Interface, Proc, Inter);
+ Sub_Chain_Append (First_Interface, Last_Interface, Inter);
+ Set_Interface_Declaration_Chain (Proc, First_Interface);
Compute_Subprogram_Hash (Proc);
-- Add it to the list.
Insert_Incr (Last, Proc);
@@ -210,14 +210,13 @@ package body Vhdl.Sem_Utils is
Set_Implicit_Definition (Proc, Iir_Predefined_File_Close);
Set_Visible_Flag (Proc, True);
Set_Wait_State (Proc, False);
- Build_Init (Last_Interface);
Inter := Create_Iir (Iir_Kind_Interface_File_Declaration);
Set_Identifier (Inter, Std_Names.Name_F);
Set_Location (Inter, Loc);
Set_Type (Inter, Type_Definition);
Set_Mode (Inter, Iir_Inout_Mode);
Set_Visible_Flag (Inter, True);
- Append (Last_Interface, Proc, Inter);
+ Set_Interface_Declaration_Chain (Proc, Inter);
Compute_Subprogram_Hash (Proc);
-- Add it to the list.
Insert_Incr (Last, Proc);
@@ -236,14 +235,14 @@ package body Vhdl.Sem_Utils is
Set_Parent (Proc, Get_Parent (Decl));
Set_Visible_Flag (Proc, True);
Set_Wait_State (Proc, False);
- Build_Init (Last_Interface);
+ Sub_Chain_Init (First_Interface, Last_Interface);
Inter := Create_Iir (File_Interface_Kind);
Set_Identifier (Inter, Std_Names.Name_F);
Set_Location (Inter, Loc);
Set_Type (Inter, Type_Definition);
Set_Mode (Inter, Iir_In_Mode);
Set_Visible_Flag (Inter, True);
- Append (Last_Interface, Proc, Inter);
+ Sub_Chain_Append (First_Interface, Last_Interface, Inter);
Inter := Create_Iir (Iir_Kind_Interface_Variable_Declaration);
Set_Identifier (Inter, Std_Names.Name_Value);
Set_Location (Inter, Loc);
@@ -251,7 +250,7 @@ package body Vhdl.Sem_Utils is
Set_Type (Inter, Type_Mark_Type);
Set_Mode (Inter, Iir_Out_Mode);
Set_Visible_Flag (Inter, True);
- Append (Last_Interface, Proc, Inter);
+ Sub_Chain_Append (First_Interface, Last_Interface, Inter);
if Get_Kind (Type_Mark_Type) in Iir_Kinds_Array_Type_Definition
and then Get_Constraint_State (Type_Mark_Type) /= Fully_Constrained
then
@@ -261,11 +260,12 @@ package body Vhdl.Sem_Utils is
Set_Type (Inter, Std_Package.Natural_Subtype_Definition);
Set_Mode (Inter, Iir_Out_Mode);
Set_Visible_Flag (Inter, True);
- Append (Last_Interface, Proc, Inter);
+ Sub_Chain_Append (First_Interface, Last_Interface, Inter);
Set_Implicit_Definition (Proc, Iir_Predefined_Read_Length);
else
Set_Implicit_Definition (Proc, Iir_Predefined_Read);
end if;
+ Set_Interface_Declaration_Chain (Proc, First_Interface);
Compute_Subprogram_Hash (Proc);
-- Add it to the list.
Insert_Incr (Last, Proc);
@@ -277,7 +277,7 @@ package body Vhdl.Sem_Utils is
Set_Parent (Proc, Get_Parent (Decl));
Set_Visible_Flag (Proc, True);
Set_Wait_State (Proc, False);
- Build_Init (Last_Interface);
+ Sub_Chain_Init (First_Interface, Last_Interface);
Inter := Create_Iir (File_Interface_Kind);
Set_Identifier (Inter, Std_Names.Name_F);
Set_Location (Inter, Loc);
@@ -286,7 +286,7 @@ package body Vhdl.Sem_Utils is
Set_Name_Staticness (Inter, Locally);
Set_Expr_Staticness (Inter, None);
Set_Visible_Flag (Inter, True);
- Append (Last_Interface, Proc, Inter);
+ Sub_Chain_Append (First_Interface, Last_Interface, Inter);
Inter := Create_Iir (Iir_Kind_Interface_Constant_Declaration);
Set_Identifier (Inter, Std_Names.Name_Value);
Set_Location (Inter, Loc);
@@ -294,8 +294,9 @@ package body Vhdl.Sem_Utils is
Set_Type (Inter, Type_Mark_Type);
Set_Mode (Inter, Iir_In_Mode);
Set_Visible_Flag (Inter, True);
- Append (Last_Interface, Proc, Inter);
+ Sub_Chain_Append (First_Interface, Last_Interface, Inter);
Set_Implicit_Definition (Proc, Iir_Predefined_Write);
+ Set_Interface_Declaration_Chain (Proc, First_Interface);
Compute_Subprogram_Hash (Proc);
-- Add it to the list.
Insert_Incr (Last, Proc);
@@ -308,7 +309,6 @@ package body Vhdl.Sem_Utils is
Set_Parent (Proc, Get_Parent (Decl));
Set_Visible_Flag (Proc, True);
Set_Wait_State (Proc, False);
- Build_Init (Last_Interface);
Inter := Create_Iir (File_Interface_Kind);
Set_Identifier (Inter, Std_Names.Name_F);
Set_Location (Inter, Loc);
@@ -316,31 +316,32 @@ package body Vhdl.Sem_Utils is
Set_Name_Staticness (Inter, Locally);
Set_Expr_Staticness (Inter, None);
Set_Visible_Flag (Inter, True);
- Append (Last_Interface, Proc, Inter);
Set_Implicit_Definition (Proc, Iir_Predefined_Flush);
+ Set_Interface_Declaration_Chain (Proc, Inter);
Compute_Subprogram_Hash (Proc);
-- Add it to the list.
Insert_Incr (Last, Proc);
end if;
+
-- Create the implicit function endfile declaration.
Func := Create_Iir (Iir_Kind_Function_Declaration);
Set_Identifier (Func, Std_Names.Name_Endfile);
Set_Location (Func, Loc);
Set_Parent (Func, Get_Parent (Decl));
Set_Visible_Flag (Func, True);
- Build_Init (Last_Interface);
Inter := Create_Iir (File_Interface_Kind);
Set_Identifier (Inter, Std_Names.Name_F);
Set_Location (Inter, Loc);
Set_Type (Inter, Type_Definition);
Set_Mode (Inter, Iir_In_Mode);
Set_Visible_Flag (Inter, True);
- Append (Last_Interface, Func, Inter);
Set_Return_Type (Func, Std_Package.Boolean_Type_Definition);
Set_Implicit_Definition (Func, Iir_Predefined_Endfile);
+ Set_Interface_Declaration_Chain (Func, Inter);
Compute_Subprogram_Hash (Func);
-- Add it to the list.
Insert_Incr (Last, Func);
+
end Create_Implicit_File_Primitives;
procedure Create_Implicit_Operations
diff --git a/src/vhdl/vhdl-std_package.adb b/src/vhdl/vhdl-std_package.adb
index fb68dfd64..3d7a78c85 100644
--- a/src/vhdl/vhdl-std_package.adb
+++ b/src/vhdl/vhdl-std_package.adb
@@ -23,7 +23,7 @@ with Std_Names; use Std_Names;
with Flags; use Flags;
with Vhdl.Utils;
with Vhdl.Sem_Utils;
-with Iir_Chains;
+with Vhdl.Nodes_Utils; use Vhdl.Nodes_Utils;
package body Vhdl.Std_Package is
type Bound_Array is array (Boolean) of Iir_Int64;
@@ -790,8 +790,7 @@ package body Vhdl.Std_Package is
-- time definition
declare
Time_Staticness : Iir_Staticness;
- Last_Unit : Iir_Unit_Declaration;
- use Iir_Chains.Unit_Chain_Handling;
+ First_Unit, Last_Unit : Iir_Unit_Declaration;
function Create_Std_Phys_Lit_Wo_Unit (Value : Iir_Int64; Unit : Iir)
return Iir_Physical_Int_Literal
@@ -841,7 +840,7 @@ package body Vhdl.Std_Package is
Set_Expr_Staticness (Unit, Time_Staticness);
Set_Name_Staticness (Unit, Locally);
- Append (Last_Unit, Time_Type_Definition, Unit);
+ Sub_Chain_Append (First_Unit, Last_Unit, Unit);
end Create_Unit;
Constraint : Iir_Range_Expression;
@@ -861,7 +860,7 @@ package body Vhdl.Std_Package is
not Flags.Flag_Whole_Analyze);
Set_End_Has_Reserved_Id (Time_Type_Definition, True);
- Build_Init (Last_Unit);
+ Sub_Chain_Init (First_Unit, Last_Unit);
Time_Fs_Unit := Create_Std_Decl (Iir_Kind_Unit_Declaration);
Set_Std_Identifier (Time_Fs_Unit, Name_Fs);
@@ -870,7 +869,7 @@ package body Vhdl.Std_Package is
Set_Name_Staticness (Time_Fs_Unit, Locally);
Set_Physical_Literal
(Time_Fs_Unit, Create_Std_Phys_Lit (1, Time_Fs_Unit));
- Append (Last_Unit, Time_Type_Definition, Time_Fs_Unit);
+ Sub_Chain_Append (First_Unit, Last_Unit, Time_Fs_Unit);
Create_Unit (Time_Ps_Unit, 1000, Time_Fs_Unit, Name_Ps);
Create_Unit (Time_Ns_Unit, 1000, Time_Ps_Unit, Name_Ns);
@@ -886,6 +885,7 @@ package body Vhdl.Std_Package is
Set_Identifier (Time_Type_Declaration, Name_Time);
Set_Type_Definition (Time_Type_Declaration, Time_Type_Definition);
Set_Type_Declarator (Time_Type_Definition, Time_Type_Declaration);
+ Set_Unit_Chain (Time_Type_Definition, First_Unit);
Add_Decl (Time_Type_Declaration);
Add_Implicit_Operations (Time_Type_Declaration);