synth: factorize code to read memories.

3 files changed, 47 insertions, 74 deletions

diff --git a/src/synth/synth-expr.adb b/src/synth/synth-expr.adb
index aa743c5e3..4fbc5e5d3 100644
--- a/src/synth/synth-expr.adb
+++ b/src/synth/synth-expr.adb
@@ -975,38 +975,6 @@ package body Synth.Expr is
       end if;
    end Synth_Indexed_Name;
 
-   function Synth_Indexed_Name (Syn_Inst : Synth_Instance_Acc; Name : Node)
-                               return Value_Acc
-   is
-      Pfx_Val : Value_Acc;
-      Voff : Net;
-      Off : Uns32;
-      W : Width;
-      El_Typ : Type_Acc;
-      Res : Net;
-   begin
-      Pfx_Val := Synth_Expression (Syn_Inst, Get_Prefix (Name));
-
-      Synth_Indexed_Name (Syn_Inst, Name, Pfx_Val.Typ, Voff, Off, W);
-      El_Typ := Get_Array_Element (Pfx_Val.Typ);
-
-      if Voff = No_Net then
-         if W = 1 and then Pfx_Val.Kind = Value_Array then
-            return Bit_Extract (Pfx_Val, Off, Name);
-         else
-            Res := Build_Extract (Build_Context, Get_Net (Pfx_Val), Off, W);
-            Set_Location (Res, Name);
-            return Create_Value_Net (Res, El_Typ);
-         end if;
-      else
-         pragma Assert (Off = 0);
-         Res := Build_Dyn_Extract (Build_Context, Get_Net (Pfx_Val),
-                                   Voff, Off, W);
-         Set_Location (Res, Name);
-         return Create_Value_Net (Res, El_Typ);
-      end if;
-   end Synth_Indexed_Name;
-
    function Is_Const (N : Net) return Boolean is
    begin
       case Get_Id (Get_Module (Get_Parent (N))) is
@@ -1270,39 +1238,6 @@ package body Synth.Expr is
       end if;
    end Synth_Slice_Suffix;
 
-   function Synth_Slice_Name (Syn_Inst : Synth_Instance_Acc; Name : Node)
-                              return Value_Acc
-   is
-      Pfx_Node : constant Node := Get_Prefix (Name);
-      Pfx : constant Value_Acc :=
-        Synth_Expression_With_Basetype (Syn_Inst, Pfx_Node);
-      Pfx_Bnd : Bound_Type;
-      El_Typ : Type_Acc;
-      Res_Bnd : Bound_Type;
-      Res_Type : Type_Acc;
-      Inp : Net;
-      Off : Uns32;
-      Wd : Uns32;
-      N : Net;
-   begin
-      Get_Onedimensional_Array_Bounds (Pfx.Typ, Pfx_Bnd, El_Typ);
-
-      Synth_Slice_Suffix (Syn_Inst, Name, Pfx_Bnd, El_Typ.W,
-                          Res_Bnd, Inp, Off, Wd);
-      if Inp /= No_Net then
-         N := Build_Dyn_Extract (Build_Context, Get_Net (Pfx), Inp, Off, Wd);
-         Set_Location (N, Name);
-         --  TODO: the bounds cannot be created as they are not known.
-         Res_Type := Create_Slice_Type (Wd, El_Typ);
-         return Create_Value_Net (N, Res_Type);
-      else
-         N := Build_Extract (Build_Context, Get_Net (Pfx), Off, Wd);
-         Set_Location (N, Name);
-         Res_Type := Create_Onedimensional_Array_Subtype (Pfx.Typ, Res_Bnd);
-         return Create_Value_Net (N, Res_Type);
-      end if;
-   end Synth_Slice_Name;
-
    --  Match: clk_signal_name'event
    --  and return clk_signal_name.
    function Extract_Event_Expr_Prefix (Expr : Node) return Node is
@@ -1569,10 +1504,20 @@ package body Synth.Expr is
             return Synth_Name (Syn_Inst, Expr);
          when Iir_Kind_Reference_Name =>
             return Synth_Name (Syn_Inst, Get_Named_Entity (Expr));
-         when Iir_Kind_Indexed_Name =>
-            return Synth_Indexed_Name (Syn_Inst, Expr);
-         when Iir_Kind_Slice_Name =>
-            return Synth_Slice_Name (Syn_Inst, Expr);
+         when Iir_Kind_Indexed_Name
+           | Iir_Kind_Slice_Name =>
+            declare
+               Obj : Value_Acc;
+               Off : Uns32;
+               Typ : Type_Acc;
+
+               Voff : Net;
+               Rdwd : Width;
+            begin
+               Synth_Assignment_Prefix (Syn_Inst, Expr,
+                                        Obj, Off, Voff, Rdwd, Typ);
+               return Synth_Read_Memory (Syn_Inst, Obj, Off, Voff, Typ, Expr);
+            end;
          when Iir_Kind_Selected_Element =>
             declare
                Idx : constant Iir_Index32 :=
@@ -1711,5 +1656,4 @@ package body Synth.Expr is
       Basetype := Get_Value_Type (Syn_Inst, Get_Base_Type (Get_Type (Expr)));
       return Synth_Expression_With_Type (Syn_Inst, Expr, Basetype);
    end Synth_Expression_With_Basetype;
-
 end Synth.Expr;
diff --git a/src/synth/synth-stmts.adb b/src/synth/synth-stmts.adb
index 73f45fc63..7d09680c1 100644
--- a/src/synth/synth-stmts.adb
+++ b/src/synth/synth-stmts.adb
@@ -132,7 +132,9 @@ package body Synth.Stmts is
          when Iir_Kind_Interface_Signal_Declaration
            | Iir_Kind_Variable_Declaration
            | Iir_Kind_Signal_Declaration
-           | Iir_Kind_Anonymous_Signal_Declaration =>
+           | Iir_Kind_Anonymous_Signal_Declaration
+           | Iir_Kind_Interface_Constant_Declaration
+           | Iir_Kind_Constant_Declaration =>
             declare
                Targ : constant Value_Acc := Get_Value (Syn_Inst, Pfx);
             begin
@@ -173,10 +175,10 @@ package body Synth.Stmts is
                      Dest_Voff := Voff;
                      Dest_Rdwd := Dest_W;
                   else
-                     raise Internal_Error;
+                     Dest_Voff := Build_Addidx
+                       (Get_Build (Syn_Inst), Dest_Voff, Voff);
                   end if;
                end if;
-
             end;
 
          when Iir_Kind_Selected_Element =>
@@ -220,7 +222,8 @@ package body Synth.Stmts is
                   end if;
                   Dest_Type := Create_Slice_Type (Wd, El_Typ);
                else
-                  Dest_Type := Create_Vector_Type (Res_Bnd, El_Typ);
+                  Dest_Type :=
+                    Create_Onedimensional_Array_Subtype (Dest_Type, Res_Bnd);
                end if;
             end;
 
@@ -381,6 +384,25 @@ package body Synth.Stmts is
       Synth_Assignment (Syn_Inst, Info, Val, Loc);
    end Synth_Assignment;
 
+   function Synth_Read_Memory (Syn_Inst : Synth_Instance_Acc;
+                               Obj : Value_Acc;
+                               Off : Uns32;
+                               Voff : Net;
+                               Typ : Type_Acc;
+                               Loc : Node) return Value_Acc
+   is
+      N : Net;
+   begin
+      if Voff /= No_Net then
+         N := Build_Dyn_Extract
+           (Get_Build (Syn_Inst), Get_Net (Obj), Voff, Off, Typ.W);
+      else
+         N := Build_Extract (Get_Build (Syn_Inst), Get_Net (Obj), Off, Typ.W);
+      end if;
+      Set_Location (N, Loc);
+      return Create_Value_Net (N, Typ);
+   end Synth_Read_Memory;
+
    --  Concurrent or sequential simple signal assignment
    procedure Synth_Simple_Signal_Assignment
      (Syn_Inst : Synth_Instance_Acc; Stmt : Node)
diff --git a/src/synth/synth-stmts.ads b/src/synth/synth-stmts.ads
index b561e1853..aed471c03 100644
--- a/src/synth/synth-stmts.ads
+++ b/src/synth/synth-stmts.ads
@@ -46,6 +46,13 @@ package Synth.Stmts is
                                Val : Value_Acc;
                                Loc : Node);
 
+   function Synth_Read_Memory (Syn_Inst : Synth_Instance_Acc;
+                               Obj : Value_Acc;
+                               Off : Uns32;
+                               Voff : Net;
+                               Typ : Type_Acc;
+                               Loc : Node) return Value_Acc;
+
    function Synth_User_Function_Call
      (Syn_Inst : Synth_Instance_Acc; Expr : Node) return Value_Acc;