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| author | Tristan Gingold <tgingold@free.fr> | 2022-03-02 06:21:56 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-03-02 06:21:56 +0100 |
| commit | 2d3d066e098cf9d00184e720f40a7a3c3eed051d (patch) | |
| tree | 2e35e72d84ce3b1380586a8965e9e37e09309490 | |
| parent | b055428679f53116f1eba50ee07c0edf823e19ed (diff) | |
| download | ghdl-2d3d066e098cf9d00184e720f40a7a3c3eed051d.tar.gz ghdl-2d3d066e098cf9d00184e720f40a7a3c3eed051d.tar.bz2 ghdl-2d3d066e098cf9d00184e720f40a7a3c3eed051d.zip | |
synth-vhdl_oper: implement <= for arrays. Fix #1991
| -rw-r--r-- | src/synth/netlists-builders.ads | 2 | ||||
| -rw-r--r-- | src/synth/synth-vhdl_oper.adb | 24 |
2 files changed, 19 insertions, 7 deletions
diff --git a/src/synth/netlists-builders.ads b/src/synth/netlists-builders.ads index 4cec3fc72..6111d045f 100644 --- a/src/synth/netlists-builders.ads +++ b/src/synth/netlists-builders.ads @@ -115,6 +115,8 @@ package Netlists.Builders is function Build_Extend (Ctxt : Context_Acc; Id : Module_Id; I : Net; W : Width) return Net; + -- Note: OFF is the offset, 0 is LSB. + function Build_Extract (Ctxt : Context_Acc; I : Net; Off, W : Width) return Net; diff --git a/src/synth/synth-vhdl_oper.adb b/src/synth/synth-vhdl_oper.adb index b423bd149..cc6c978b8 100644 --- a/src/synth/synth-vhdl_oper.adb +++ b/src/synth/synth-vhdl_oper.adb @@ -501,23 +501,31 @@ package body Synth.Vhdl_Oper is function Synth_Compare_Array (Id : Compare_Module_Id; Res_Type : Type_Acc) return Valtyp is - N : Net; + Ln, Rn, N : Net; begin if Left.Typ.Kind = Type_Vector then + Ln := Get_Net (Ctxt, Left); + Rn := Get_Net (Ctxt, Right); Warning_Msg_Synth (+Expr, "comparing non-numeric vector is unexpected"); if Left.Typ.W = Right.Typ.W then - N := Build2_Compare - (Ctxt, Id, Get_Net (Ctxt, Left), Get_Net (Ctxt, Right)); - Set_Location (N, Expr); - return Create_Value_Net (N, Res_Type); + N := Build2_Compare (Ctxt, Id, Ln, Rn); elsif Left.Typ.W < Right.Typ.W then - -- TODO: truncate right, compare using id_eq. - raise Internal_Error; + -- Truncate right. + Rn := Build_Extract + (Ctxt, Rn, Right.Typ.W - Left.Typ.W, Left.Typ.W); + -- Because it has been truncated, it cannot be equal. + if Id = Id_Ule then + N := Build2_Compare (Ctxt, Id_Ult, Ln, Rn); + else + raise Internal_Error; + end if; else -- TODO: truncate left, compare using id. raise Internal_Error; end if; + Set_Location (N, Expr); + return Create_Value_Net (N, Res_Type); else raise Internal_Error; end if; @@ -972,6 +980,8 @@ package body Synth.Vhdl_Oper is return Synth_Compare_Array (Id_Uge, Boolean_Type); when Iir_Predefined_Array_Less => return Synth_Compare_Array (Id_Ult, Boolean_Type); + when Iir_Predefined_Array_Less_Equal => + return Synth_Compare_Array (Id_Ule, Boolean_Type); when Iir_Predefined_Array_Element_Concat => declare |