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| author | Tristan Gingold <tgingold@free.fr> | 2019-11-22 18:31:53 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-11-22 18:31:53 +0100 |
| commit | 14fabc924d198110afd39e7c94f7b37843109ad4 (patch) | |
| tree | 2832b17dad3c3f6fdf878fb182f7b83e5db4c583 | |
| parent | 326da7937c313109c8877ed02c1c862170abb2ed (diff) | |
| download | ghdl-14fabc924d198110afd39e7c94f7b37843109ad4.tar.gz ghdl-14fabc924d198110afd39e7c94f7b37843109ad4.tar.bz2 ghdl-14fabc924d198110afd39e7c94f7b37843109ad4.zip | |
synth-static_oper: handle or for uns and sgn.
| -rw-r--r-- | src/synth/synth-static_oper.adb | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/synth/synth-static_oper.adb b/src/synth/synth-static_oper.adb index 81e5171c0..e7d06cfe8 100644 --- a/src/synth/synth-static_oper.adb +++ b/src/synth/synth-static_oper.adb @@ -263,7 +263,9 @@ package body Synth.Static_Oper is | Iir_Predefined_Ieee_Numeric_Std_And_Sgn_Sgn => return Synth_Vector_Dyadic (Left, Right, And_Table, Expr); - when Iir_Predefined_Ieee_1164_Vector_Or => + when Iir_Predefined_Ieee_1164_Vector_Or + | Iir_Predefined_Ieee_Numeric_Std_Or_Uns_Uns + | Iir_Predefined_Ieee_Numeric_Std_Or_Sgn_Sgn => return Synth_Vector_Dyadic (Left, Right, Or_Table, Expr); when Iir_Predefined_Ieee_Numeric_Std_Add_Uns_Uns => |