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author | Tristan Gingold <tgingold@free.fr> | 2020-01-18 09:09:20 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2020-01-18 09:09:20 +0100 |
commit | 130d32b9dd7474314c4eaa9ace842f509cc2ec02 (patch) | |
tree | f2bdb2db8c4ece1e18abe782bf5e9cb6011961ec | |
parent | 0887e3a2b00616636e0278f5187364c0f28bf1e1 (diff) | |
download | ghdl-130d32b9dd7474314c4eaa9ace842f509cc2ec02.tar.gz ghdl-130d32b9dd7474314c4eaa9ace842f509cc2ec02.tar.bz2 ghdl-130d32b9dd7474314c4eaa9ace842f509cc2ec02.zip |
synth: rewrite to work-around old compiler wrong warning.
-rw-r--r-- | src/synth/netlists-disp_vhdl.adb | 14 |
1 files changed, 4 insertions, 10 deletions
diff --git a/src/synth/netlists-disp_vhdl.adb b/src/synth/netlists-disp_vhdl.adb index 1e676f11e..2bf9005cf 100644 --- a/src/synth/netlists-disp_vhdl.adb +++ b/src/synth/netlists-disp_vhdl.adb @@ -155,7 +155,6 @@ package body Netlists.Disp_Vhdl is Imod : constant Module := Get_Module (Inst); Idx : Port_Idx; Max_Idx : Port_Idx; - P_Idx : Param_Idx; Name : Sname; First : Boolean; begin @@ -181,19 +180,14 @@ package body Netlists.Disp_Vhdl is if Get_Nbr_Params (Imod) /= 0 then Put_Line (" generic map ("); - First := True; - Idx := 0; - for P in Params (Inst) loop - if First then - First := False; - else + for P in 1 .. Get_Nbr_Params (Inst) loop + if P > 1 then Put_Line (","); end if; Put (" "); - P_Idx := Get_Param_Idx (P); - Put_Interface_Name (Get_Param_Desc (Imod, P_Idx).Name); + Put_Interface_Name (Get_Param_Desc (Imod, P - 1).Name); Put (" => "); - Put_Uns32 (Get_Param_Uns32 (Inst, P_Idx)); + Put_Uns32 (Get_Param_Uns32 (Inst, P - 1)); end loop; Put_Line (")"); Put_Line (" port map ("); |