iCE40/ghdl-yosys-plugin - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Improve examples for Lattice iCEstick	Aimylios	2020-04-19	13	-0/+34
\| \| \| \| \| \| \|	- move "leds" examples to subdirectory - add Makefile - add *.json files to .gitignore - adjust README.md and fix some typos
*	Adjust ecp5_versa tests. Wrappers for verilog modules are not needed anymore.	Tristan Gingold	2020-03-31	2	-16/+12
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*	Added ECP5 example for Lattice versa devkit (#85)	Martin	2020-02-14	12	-0/+1539
\| \| \| \| \| \| \|	- LED blinky - Added support for vendor primitives - Workarounds in Verilog for BRAM and primitive wrapping - Docker support Makefiles - openocd support files
*	migrate from Travis to GHA and rework examples (#78)	eine	2020-01-19	29	-0/+905
	* migrate from Travis to GHA * rework examples