diff options
Diffstat (limited to 'testsuite/ghdl-issues/issue1610/exp.vhdl')
-rw-r--r-- | testsuite/ghdl-issues/issue1610/exp.vhdl | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/testsuite/ghdl-issues/issue1610/exp.vhdl b/testsuite/ghdl-issues/issue1610/exp.vhdl new file mode 100644 index 0000000..3d3ac38 --- /dev/null +++ b/testsuite/ghdl-issues/issue1610/exp.vhdl @@ -0,0 +1,32 @@ +library IEEE; +use IEEE.std_logic_1164.ALL; +use IEEE.numeric_std.ALL; + +entity exp is + port ( + clk : in std_logic + ); +end entity exp; + +architecture behav of exp is + + signal ver_clk : std_logic; + signal count : integer := 0; + + attribute gclk : boolean; + attribute gclk of ver_clk : signal is true; + +begin + + default Clock is rising_edge(clk); + + process (ver_clk) + begin + if rising_edge(ver_clk) then + count <= count + 1; + end if; + end process; + + assert always next count = prev(count) + 1; + +end architecture behav; |