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-rwxr-xr-xtestsuite/examples/test-ecp5_versa/testsuite.sh1
1 files changed, 0 insertions, 1 deletions
diff --git a/testsuite/examples/test-ecp5_versa/testsuite.sh b/testsuite/examples/test-ecp5_versa/testsuite.sh
index 44dac88..8574b94 100755
--- a/testsuite/examples/test-ecp5_versa/testsuite.sh
+++ b/testsuite/examples/test-ecp5_versa/testsuite.sh
@@ -16,7 +16,6 @@ VHDL_SYN_FILES="$src/versa_ecp5_top.vhdl \
VERILOG_FILES="\
$top/library/wrapper/primitives.v \
- $top/library/wrapper/wrapper.v \
$top/library/wrapper/bram.v
"