Add tests/examples for dff (both pos and neg edge).

1 files changed, 20 insertions, 0 deletions

diff --git a/testsuite/examples/dff/negdff.vhdl b/testsuite/examples/dff/negdff.vhdl
new file mode 100644
index 0000000..2d2fb11
--- /dev/null
+++ b/testsuite/examples/dff/negdff.vhdl
@@ -0,0 +1,20 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity negdff is
+	port(
+		clk : in std_logic;
+		d : in std_logic;
+		q : out std_logic
+	);
+end entity;
+
+architecture arch of negdff is
+begin
+	process (clk)
+	begin
+		if falling_edge(clk) then
+			q <= d;
+		end if;
+	end process;
+end architecture;