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authorAimylios <20016942+aimylios@users.noreply.github.com>2020-04-19 14:20:37 +0200
committertgingold <tgingold@users.noreply.github.com>2020-04-19 16:08:35 +0200
commit8bb8453af7acd34705a449cac9cd8427d6db43ba (patch)
tree9243aaa5ec9c4f91abd7291af432dbba41772815 /examples/icestick/blink.vhdl
parentd941c8f65bbbb90f97c17e26b5610624c2198b10 (diff)
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Improve examples for Lattice iCEstick
- move "leds" examples to subdirectory - add Makefile - add *.json files to .gitignore - adjust README.md and fix some typos
Diffstat (limited to 'examples/icestick/blink.vhdl')
-rw-r--r--examples/icestick/blink.vhdl23
1 files changed, 0 insertions, 23 deletions
diff --git a/examples/icestick/blink.vhdl b/examples/icestick/blink.vhdl
deleted file mode 100644
index d7e6dd4..0000000
--- a/examples/icestick/blink.vhdl
+++ /dev/null
@@ -1,23 +0,0 @@
-architecture blink of leds is
- signal clk_4hz: std_logic;
-begin
- process (clk)
- -- 3_000_000 is 0x2dc6c0
- variable counter : unsigned (23 downto 0);
- begin
- if rising_edge(clk) then
- if counter = 2_999_999 then
- counter := x"000000";
- clk_4hz <= not clk_4hz;
- else
- counter := counter + 1;
- end if;
- end if;
- end process;
-
- led1 <= clk_4hz;
- led2 <= clk_4hz;
- led3 <= clk_4hz;
- led4 <= clk_4hz;
- led5 <= clk_4hz;
-end blink;