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* spi25: Merge remainder of spi4ba inNico Huber2017-12-281-317/+0
| | | | | | | | Change-Id: If581e24347e45cbb27002ea99ffd70e334c110cf Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/22388 Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* spi4ba: Drop now obsolete, redundant functionsNico Huber2017-12-281-651/+0
| | | | | | | | Change-Id: I1d04448fd1acbfc37b8e17288f497a4292dfd6d6 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/22387 Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* spi25: Integrate 4BA supportNico Huber2017-12-281-4/+17
| | | | | | | | | | | | | | | | | | Allow 4-byte addresses for instructions usually used with 3-byte addresses. Decide in which way the 4th byte will be communicated based on the state of the chip (i.e. have we enabled 4BA mode) and a new feature bit for an extended address register. If we are not in 4BA mode and no extended address register is available or the write to it fails, bail out. We cache the state of 4BA mode and the extended address register in the flashctx. Change-Id: I644600beaab9a571b97b67f7516abe571d3460c1 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/22384 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 4BA: Add spi_exit_4ba function to switch SPI flash to 3-byte addressingEd Swierk2017-10-151-0/+43
| | | | | | | | Change-Id: I553e7fb5028f35e14a3a81b3fa8903c1b321a223 Signed-off-by: Ed Swierk <eswierk@skyportsystems.com> Reviewed-on: https://review.coreboot.org/20509 Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 4BA: Support for new direct-4BA instructions + W25Q256.V updateBoris Baykov2017-10-151-0/+265
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Large flash chips usually support special instructions to work with 4-bytes address directly from 3-bytes addressing mode and without do switching to 4-bytes mode. There are 13h (4BA Read), 12h (4BA Program) and 21h,5Ch,DCh (4BA Erase), correspondingly. However not all these instructions are supported by all large flash chips. Some chips support 13h only, some 13h,12h,21h and DCh, but not 5Ch. This depends on the manufacturer of the chip. This patch provides code to use direct 4-bytes addressing instructions. This code should work but it tested partially only. My W25Q256FV has support for 4BA_Read (13h), but doesn't have support 4BA_Program (12h) and 4BA_Erase instructions. So, direct 4BA program and erase should be tested after. Patched files ------------- chipdrivers.h + added functions declarations for spi4ba.c flash.h + feature definitions added flashchips.c + modified definition of Winbond W25Q256BV/W25Q256FV chips flashrom.c + modified switch to 4-bytes addressing for direct-4BA instructions spi4ba.h + definitions for 4-bytes addressing JEDEC commands + functions declarations from spi4ba.c (same as in chipdrivers.h, just to see) spi4ba.c + functions for read/write/erase directly with 4-bytes address (from any mode) Change-Id: Ib51bcc5de7826b30ad697fcbb9a5152bde2c2ac9 Signed-off-by: Boris Baykov <dev@borisbaykov.com>, Russia, Jan 2014 [clg: ported from https://www.flashrom.org/pipermail/flashrom/2015-January/013198.html ] Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-on: https://review.coreboot.org/20508 Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 4BA: Support for 4-bytes addressing via Extended Address RegisterBoris Baykov2017-10-151-0/+328
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On some flash chips data with addresses more than 24-bit field can address may be accessed by using Extended Address Register. The register has 1-byte size and stores high byte of 32-bit address. Then flash can be read from 3-bytes addressing mode with writing high byte of address to this Register. By using this way we have access to full memory of a chip. Some chips may support this method only. This patch provides code use Extended Address Register. Patched files ------------- chipdrivers.h + added functions declarations for spi4ba.c flash.h + feature definitions added flashrom.c + modified switch to 4-bytes addressing to support extended address register spi4ba.h + definitions for 4-bytes addressing JEDEC commands + functions declarations from spi4ba.c (same as in chipdrivers.h, just to see) spi4ba.c + functions for write Extended Address Register + functions for read/write/erase with Extended Address Register Change-Id: I09a8aa11de2ca14901f142c67c83c4fa0def4e27 Signed-off-by: Boris Baykov <dev@borisbaykov.com>, Russia, Jan 2014 [clg: ported from https://www.flashrom.org/pipermail/flashrom/2015-January/013200.html ] Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-on: https://review.coreboot.org/20507 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* fixup! 4BA: Basic support for 4-bytes addressing mode extensionsBoris Baykov2017-10-141-21/+13
| | | | | | | | | | | Fix some whitespace, and braces. Remove sector size from comments that I could not verify. Change-Id: I4faaa036fea744135fa37f405686fb9fd0882806 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/21947 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* 4BA: Basic support for 4-bytes addressing mode extensionsBoris Baykov2017-10-141-0/+327
If flash chip is switched to 4-bytes addressing mode then all read/erase/program instructions will be switched from 3-bytes mode to 4-bytes mode. Then well known instructions like 03h (Read), 02h (Program) and 20h,52h,D8h (Erase) will become one byte longer and accept 4-bytes address instead of 3-bytes. This patch provides support for well known instructions in 4-bytes addressing mode. Also here is the code to enter 4-bytes addressing mode by execute the instruction B7h (Enter 4-bytes mode). Patched files ------------- chipdrivers.h + added functions declarations for spi4ba.c flash.h + feature definitions added Makefile + added spi4ba.c Added files ----------- spi4ba.h + definitions for 4-bytes addressing JEDEC commands + functions declarations from spi4ba.c (same as in chipdrivers.h, just to see) spi4ba.c + functions for enter 4-bytes addressing mode + functions for read/write/erase in 4-bytes addressing mode Change-Id: Ie72e2a89cd75fb4d09f48e81c4c1d927c317b7a7 Signed-off-by: Boris Baykov <dev@borisbaykov.com>, Russia, Jan 2014 [clg: ported from https://www.flashrom.org/pipermail/flashrom/2015-January/013199.html ] Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-on: https://review.coreboot.org/20513 Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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