aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat
-rw-r--r--flashchips.c2
-rw-r--r--print.c4
2 files changed, 4 insertions, 2 deletions
diff --git a/flashchips.c b/flashchips.c
index 6d4f61af..96d41a3f 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -7597,7 +7597,7 @@ struct flashchip flashchips[] = {
.total_size = 1024,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
- .tested = TEST_OK_PRE,
+ .tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
diff --git a/print.c b/print.c
index 2ed22a7c..8bdc384f 100644
--- a/print.c
+++ b/print.c
@@ -358,6 +358,7 @@ const struct board_info boards_known[] = {
B("Artec Group","DBE62", 1, "http://wiki.thincan.org/DBE62", NULL),
B("ASI", "MB-5BLMP", 1, "http://www.hojerteknik.com/winnet.htm", "Used in the IGEL WinNET III thin client."),
B("ASRock", "775i65G", 1, "http://www.asrock.com/mb/overview.asp?Model=775i65G", NULL),
+ B("ASRock", "890GX Extreme3", 1, "http://www.asrock.com/mb/overview.asp?Model=890GX%20Extreme3", NULL),
B("ASRock", "939A785GMH/128M", 1, "http://www.asrock.com/mb/overview.asp?Model=939A785GMH/128M&s=939", NULL),
B("ASRock", "A330GC", 1, "http://www.asrock.com/mb/overview.asp?Model=A330GC", NULL),
B("ASRock", "A770CrossFire", 1, "http://www.asrock.com/mb/overview.asp?Model=A770CrossFire&s=AM2%%2b", NULL),
@@ -487,7 +488,7 @@ const struct board_info boards_known[] = {
B("GIGABYTE", "GA-MA69VM-S2", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2500", NULL),
B("GIGABYTE", "GA-MA74GM-S2H (rev. 3.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3152", NULL),
B("GIGABYTE", "GA-MA770T-UD3P", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3096", NULL),
- B("GIGABYTE", "GA-MA78G-DS3H", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2800", NULL), /* TODO: Rev 1.x or 2.x? */
+ B("GIGABYTE", "GA-MA78G-DS3H (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2800", NULL),
B("GIGABYTE", "GA-MA78GM-S2H", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2758", NULL), /* TODO: Rev. 1.0, 1.1, or 2.x? */
B("GIGABYTE", "GA-MA78GPM-DS2H", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2859", NULL),
B("GIGABYTE", "GA-MA790FX-DQ6", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2690", NULL),
@@ -541,6 +542,7 @@ const struct board_info boards_known[] = {
B("MSI", "MS-7345 (P35 Neo2-FIR)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1261", NULL),
B("MSI", "MS-7368 (K9AG Neo2-Digital)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1241", NULL),
B("MSI", "MS-7376 (K9A2 Platinum)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1332", NULL),
+ B("MSI", "MS-7596 (785GM-E51)", 1, "http://eu.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1866", NULL),
B("MSI", "MS-7642 (890GXM-G65)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=2012", NULL),
B("NEC", "PowerMate 2000", 1, "http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/", NULL),
B("Nokia", "IP530", 1, NULL, NULL),
generated by cgit v1.2.3 (git 2.25.1) at 2026-02-18 07:45:01 +0000
id='n194' href='#n194'>194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 
#!/usr/bin/env python3
import pytrellis
import database
import argparse
import json
import pip_classes
import timing_dbs
from os import path

location_types = dict()
type_at_location = dict()
tiletype_names = dict()

parser = argparse.ArgumentParser(description="import ECP5 routing and bels from Project Trellis")
parser.add_argument("device", type=str, help="target device")
parser.add_argument("-p", "--constids", type=str, help="path to constids.inc")
args = parser.parse_args()


def is_global(loc):
    return loc.x == -2 and loc.y == -2


# Get the index for a tiletype
def get_tiletype_index(name):
    if name in tiletype_names:
        return tiletype_names[name]
    idx = len(tiletype_names)
    tiletype_names[name] = idx
    return idx


constids = dict()


class BinaryBlobAssembler:
    def l(self, name, ltype = None, export = False):
        if ltype is None:
            print("label %s" % (name,))
        else:
            print("label %s %s" % (name, ltype))

    def r(self, name, comment):
        if comment is None:
            print("ref %s" % (name,))
        else:
            print("ref %s %s" % (name, comment))

    def s(self, s, comment):
        assert "|" not in s
        print("str |%s| %s" % (s, comment))

    def u8(self, v, comment):
        if comment is None:
            print("u8 %d" % (v,))
        else:
            print("u8 %d %s" % (v, comment))

    def u16(self, v, comment):
        if comment is None:
            print("u16 %d" % (v,))
        else:
            print("u16 %d %s" % (v, comment))

    def u32(self, v, comment):
        if comment is None:
            print("u32 %d" % (v,))
        else:
            print("u32 %d %s" % (v, comment))

    def pre(self, s):
        print("pre %s" % s)

    def post(self, s):
        print("post %s" % s)

    def push(self, name):
        print("push %s" % name)

    def pop(self):
        print("pop")

def get_bel_index(ddrg, loc, name):
    loctype = ddrg.locationTypes[ddrg.typeAtLocation[loc]]
    idx = 0
    for bel in loctype.bels:
        if ddrg.to_str(bel.name) == name:
            return idx
        idx += 1
    assert loc.y == max_row # Only missing IO should be special pins at bottom of device
    return None


packages = {}
pindata = []

def process_pio_db(ddrg, device):
    piofile = path.join(database.get_db_root(), "ECP5", dev_names[device], "iodb.json")
    with open(piofile, 'r') as f:
        piodb = json.load(f)
        for pkgname, pkgdata in sorted(piodb["packages"].items()):
            pins = []
            for name, pinloc in sorted(pkgdata.items()):
                x = pinloc["col"]
                y = pinloc["row"]
                loc = pytrellis.Location(x, y)
                pio = "PIO" + pinloc["pio"]
                bel_idx = get_bel_index(ddrg, loc, pio)
                if bel_idx is not None:
                    pins.append((name, loc, bel_idx))
            packages[pkgname] = pins
        for metaitem in piodb["pio_metadata"]:
            x = metaitem["col"]
            y = metaitem["row"]
            loc = pytrellis.Location(x, y)
            pio = "PIO" + metaitem["pio"]
            bank = metaitem["bank"]
            if "function" in metaitem:
                pinfunc = metaitem["function"]
            else:
                pinfunc = None
            bel_idx = get_bel_index(ddrg, loc, pio)
            if bel_idx is not None:
                pindata.append((loc, bel_idx, bank, pinfunc))

global_data = {}
quadrants = ["UL", "UR", "LL", "LR"]
def process_loc_globals(chip):
    for y in range(0, max_row+1):
        for x in range(0, max_col+1):
            quad = chip.global_data.get_quadrant(y, x)
            tapdrv = chip.global_data.get_tap_driver(y, x)
            if tapdrv.col == x:
                spinedrv = chip.global_data.get_spine_driver(quad, x)
                spine = (spinedrv.second, spinedrv.first)
            else:
                spine = (-1, -1)
            global_data[x, y] = (quadrants.index(quad), int(tapdrv.dir), tapdrv.col, spine)


speed_grade_names = ["6", "7", "8", "8_5G"]
speed_grade_cells = {}
speed_grade_pips = {}

pip_class_to_idx = {"default": 0}

timing_port_xform = {
    "RAD0": "D0",
    "RAD1": "B0",
    "RAD2": "C0",
    "RAD3": "A0",
}


def process_timing_data():
    for grade in speed_grade_names:
        with open(timing_dbs.cells_db_path("ECP5", grade)) as f:
            cell_data = json.load(f)
        cells = []
        for cell, cdata in sorted(cell_data.items()):
            celltype = constids[cell.replace(":", "_").replace("=", "_").replace(",", "_")]
            delays = []
            setupholds = []
            for entry in cdata:
                if entry["type"] == "Width":
                    continue
                elif entry["type"] == "IOPath":
                    from_pin = entry["from_pin"][1] if type(entry["from_pin"]) is list else entry["from_pin"]
                    if from_pin in timing_port_xform:
                        from_pin = timing_port_xform[from_pin]
                    to_pin = entry["to_pin"]
                    if to_pin in timing_port_xform:
                        to_pin = timing_port_xform[to_pin]
                    min_delay = min(entry["rising"][0], entry["falling"][0])
                    max_delay = min(entry["rising"][2], entry["falling"][2])
                    delays.append((constids[from_pin], constids[to_pin], min_delay, max_delay))
                elif entry["type"] == "SetupHold":
                    pin = constids[entry["pin"]]
                    clock = constids[entry["clock"][1]]
                    min_setup = entry["setup"][0]
                    max_setup = entry["setup"][2]
                    min_hold = entry["hold"][0]
                    max_hold = entry["hold"][2]
                    setupholds.append((pin, clock, min_setup, max_setup, min_hold, max_hold))
                else:
                    assert False, entry["type"]
            cells.append((celltype, delays, setupholds))
        pip_class_delays = []
        for i in range(len(pip_class_to_idx)):
            pip_class_delays.append((50, 50, 0, 0))

        with open(timing_dbs.interconnect_db_path("ECP5", grade)) as f:
            interconn_data = json.load(f)
        for pipclass, pipdata in sorted(interconn_data.items()):

            min_delay = pipdata["delay"][0] * 1.1
            max_delay = pipdata["delay"][2] * 1.1
            min_fanout = pipdata["fanout"][0]
            max_fanout = pipdata["fanout"][2]
            if grade == "6":
                pip_class_to_idx[pipclass] = len(pip_class_delays)
                pip_class_delays.append((min_delay, max_delay, min_fanout, max_fanout))
            else:
                if pipclass in pip_class_to_idx:
                    pip_class_delays[pip_class_to_idx[pipclass]] = (min_delay, max_delay, min_fanout, max_fanout)
        speed_grade_cells[grade] = cells
        speed_grade_pips[grade] = pip_class_delays


def get_pip_class(wire_from, wire_to):
    class_name = pip_classes.get_pip_class(wire_from, wire_to)
    if class_name is None or class_name not in pip_class_to_idx:
        class_name = "default"
    return pip_class_to_idx[class_name]



def write_database(dev_name, chip, ddrg, endianness):
    def write_loc(loc, sym_name):
        bba.u16(loc.x, "%s.x" % sym_name)
        bba.u16(loc.y, "%s.y" % sym_name)

    loctypes = list([_.key() for _ in ddrg.locationTypes])
    loc_with_type = {}
    for y in range(0, max_row+1):
        for x in range(0, max_col+1):
            loc_with_type[loctypes.index(ddrg.typeAtLocation[pytrellis.Location(x, y)])] = (x, y)

    def get_wire_name(arc_loctype, rel, idx):
        loc = loc_with_type[arc_loctype]
        lt = ddrg.typeAtLocation[pytrellis.Location(loc[0] + rel.x, loc[1] + rel.y)]
        wire = ddrg.locationTypes[lt].wires[idx]
        return "R{}C{}_{}".format(loc[1] + rel.y, loc[0] + rel.x, ddrg.to_str(wire.name))

    bba = BinaryBlobAssembler()
    bba.pre('#include "nextpnr.h"')