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| author | Edward O'Callaghan <quasisec@google.com> | 2022-02-22 13:58:28 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2022-03-07 00:09:07 +0000 |
| commit | 11680db4e1251eb842bee11e53b6d1f0ae67767b (patch) | |
| tree | e02e8e9f81533cdcc053ac402d5395dc065ec5b2 /util | |
| parent | 6289508c5bb028fa4f6ed58dfef974302c5616f9 (diff) | |
| download | flashrom-11680db4e1251eb842bee11e53b6d1f0ae67767b.tar.gz flashrom-11680db4e1251eb842bee11e53b6d1f0ae67767b.tar.bz2 flashrom-11680db4e1251eb842bee11e53b6d1f0ae67767b.zip | |
ichspi: Add Alder Lake support
Does exactly what it says on the tin.
BUG=b:220799648
TEST=```localhost ~ # flashrom --flash-name
<snip>
Found Programmer flash chip "Opaque flash chip" (32768 kB, Programmer-specific) mapped at physical address 0x0000000000000000.
vendor="Programmer" name="Opaque flash chip"
flashrom -p internal --ifd -i fd -i bios -r /tmp/filename.rom
flashrom unknown on Linux 5.15.22 (x86_64)
flashrom is free software, get the source code at https://flashrom.org
Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
coreboot table found at 0x768a7000.
Found chipset "Intel Alder Lake-N".
Enabling flash write... Warning: Setting BIOS Control at 0xdc from 0x8b to 0x89 failed.
New value is 0x8b.
SPI Configuration is locked down.
OK.
Found Winbond flash chip "W25Q256JV_M" (32768 kB, Programmer-specific) mapped at physical address 0x0000000000000000.
Error accessing W25Q256JV_M, 0x2000000 bytes at 0x00000000fe000000
/dev/mem mmap failed: Resource temporarily unavailable
Could not map flash chip W25Q256JV_M at 0x00000000fe000000.
Reading ich descriptor... done.
Using regions: "bios", "fd".
Error accessing W25Q256JV_M, 0x2000000 bytes at 0x00000000fe000000
/dev/mem mmap failed: Resource temporarily unavailable
Could not map flash chip W25Q256JV_M at 0x00000000fe000000.
Reading flash... done.
SUCCESS
Also,
Reading ich descriptor... Reading 4096 bytes starting at 0x000000.
done.
Assuming chipset '600 series Alder Point'.
Added layout entry 00000000 - 00000fff named fd
Added layout entry 00500000 - 01ffffff named bios
Added layout entry 00001000 - 004fffff named me
```
Tested on Nivviks/ADL-N and Brya/ADL-P.
Change-Id: Ie66cf519df13f3391c41f5016b16a81ef3dfd4bf
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62251
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Sam McNally <sammc@google.com>
Diffstat (limited to 'util')
| -rw-r--r-- | util/ich_descriptors_tool/ich_descriptors_tool.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/util/ich_descriptors_tool/ich_descriptors_tool.c b/util/ich_descriptors_tool/ich_descriptors_tool.c index f743510e..532a1fb0 100644 --- a/util/ich_descriptors_tool/ich_descriptors_tool.c +++ b/util/ich_descriptors_tool/ich_descriptors_tool.c @@ -137,6 +137,7 @@ static void usage(char *argv[], const char *error) "\t- \"300\" or \"cannon\" for Intel's 300 series chipsets.\n" "\t- \"400\" or \"comet\" for Intel's 400 series chipsets.\n" "\t- \"500\" or \"tiger\" for Intel's 500 series chipsets.\n" +"\t- \"600\" or \"alder\" for Intel's 600 series chipsets.\n" "If '-d' is specified some regions such as the BIOS image as seen by the CPU or\n" "the GbE blob that is required to initialize the GbE are also dumped to files.\n", argv[0], argv[0]); @@ -234,6 +235,8 @@ int main(int argc, char *argv[]) else if ((strcmp(csn, "500") == 0) || (strcmp(csn, "tiger") == 0)) cs = CHIPSET_500_SERIES_TIGER_POINT; + else if (strcmp(csn, "600") == 0) + cs = CHIPSET_600_SERIES_ALDER_POINT; else if (strcmp(csn, "apollo") == 0) cs = CHIPSET_APOLLO_LAKE; else if (strcmp(csn, "gemini") == 0) |