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author | Edward O'Callaghan <quasisec@google.com> | 2020-05-22 16:46:26 +1000 |
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committer | Edward O'Callaghan <quasisec@chromium.org> | 2020-06-16 02:25:17 +0000 |
commit | 41f48c75a2a708407e8c28f85eff04cbf2895f3c (patch) | |
tree | a8e51b7b3358f34be224ce388f5a2fc7ccf77d69 /tests | |
parent | 46f2d4e488db66b37e892b8fa621eeed0fe2f284 (diff) | |
download | flashrom-41f48c75a2a708407e8c28f85eff04cbf2895f3c.tar.gz flashrom-41f48c75a2a708407e8c28f85eff04cbf2895f3c.tar.bz2 flashrom-41f48c75a2a708407e8c28f85eff04cbf2895f3c.zip |
tests/: Add spi25.c unit tests
BUG=b:157280555
BRANCH=none
TEST=builds
Change-Id: I47112952835ce2c4c773a9d90379ff8ceefaaf9a
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/41645
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'tests')
-rw-r--r-- | tests/meson.build | 2 | ||||
-rw-r--r-- | tests/spi25.c | 170 | ||||
-rw-r--r-- | tests/tests.c | 13 | ||||
-rw-r--r-- | tests/tests.h | 11 |
4 files changed, 196 insertions, 0 deletions
diff --git a/tests/meson.build b/tests/meson.build index 0c21cb9c..76088c27 100644 --- a/tests/meson.build +++ b/tests/meson.build @@ -2,11 +2,13 @@ root_includes = include_directories('../subprojects') srcs = [ 'tests.c', + 'spi25.c', ] mocks = [ '-Wl,--wrap=physunmap', '-Wl,--wrap=physmap', + '-Wl,--wrap=spi_send_command', '-Wl,--gc-sections', ] diff --git a/tests/spi25.c b/tests/spi25.c new file mode 100644 index 00000000..99325742 --- /dev/null +++ b/tests/spi25.c @@ -0,0 +1,170 @@ +#include <include/test.h> + +#include "programmer.h" +#include "flashchips.h" +#include "chipdrivers.h" +#include "spi.h" + +int __wrap_spi_send_command(const struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr) +{ + check_expected_ptr(flash); + assert_int_equal(writecnt, mock_type(int)); + assert_int_equal(writearr[0], mock_type(int)); + + int rcnt = mock_type(int); + assert_int_equal(readcnt, rcnt); + for (int i = 0; i < rcnt; i++) + readarr[i] = i; + + return 0; +} + +struct flashchip mock_chip = { + .vendor = "Generic", + .name = "unknown SPI chip (RDID)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_DEVICE_ID, + .total_size = 0, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_rdid, + .write = NULL, +}; + +void spi_write_enable_test_success(void **state) +{ + (void) state; /* unused */ + + /* setup initial test state. */ + struct flashctx flashctx = { .chip = &mock_chip }; + expect_memory(__wrap_spi_send_command, flash, + &flashctx, sizeof(flashctx)); + + will_return(__wrap_spi_send_command, JEDEC_WREN_OUTSIZE); + will_return(__wrap_spi_send_command, JEDEC_WREN); + will_return(__wrap_spi_send_command, JEDEC_WREN_INSIZE); + assert_int_equal(0, spi_write_enable(&flashctx)); +} + +void spi_write_disable_test_success(void **state) +{ + (void) state; /* unused */ + + /* setup initial test state. */ + struct flashctx flashctx = { .chip = &mock_chip }; + expect_memory(__wrap_spi_send_command, flash, + &flashctx, sizeof(flashctx)); + + will_return(__wrap_spi_send_command, JEDEC_WRDI_OUTSIZE); + will_return(__wrap_spi_send_command, JEDEC_WRDI); + will_return(__wrap_spi_send_command, JEDEC_WRDI_INSIZE); + assert_int_equal(0, spi_write_disable(&flashctx)); +} + +void probe_spi_rdid_test_success(void **state) +{ + (void) state; /* unused */ + + /* setup initial test state. */ + struct flashctx flashctx = { .chip = &mock_chip }; + expect_memory(__wrap_spi_send_command, flash, + &flashctx, sizeof(flashctx)); + + will_return(__wrap_spi_send_command, JEDEC_RDID_OUTSIZE); + will_return(__wrap_spi_send_command, JEDEC_RDID); + will_return(__wrap_spi_send_command, JEDEC_RDID_INSIZE); + assert_int_equal(0, probe_spi_rdid(&flashctx)); +} + +void probe_spi_rdid4_test_success(void **state) +{ + (void) state; /* unused */ + + /* setup initial test state. */ + struct flashctx flashctx = { .chip = &mock_chip }; + expect_memory(__wrap_spi_send_command, flash, + &flashctx, sizeof(flashctx)); + + will_return(__wrap_spi_send_command, JEDEC_RDID_OUTSIZE); + will_return(__wrap_spi_send_command, JEDEC_RDID); + will_return(__wrap_spi_send_command, JEDEC_RDID_INSIZE + 1); + assert_int_equal(0, probe_spi_rdid4(&flashctx)); +} + +void probe_spi_rems_test_success(void **state) +{ + (void) state; /* unused */ + + /* setup initial test state. */ + struct flashctx flashctx = { .chip = &mock_chip }; + expect_memory(__wrap_spi_send_command, flash, + &flashctx, sizeof(flashctx)); + + will_return(__wrap_spi_send_command, JEDEC_REMS_OUTSIZE); + will_return(__wrap_spi_send_command, JEDEC_REMS); + will_return(__wrap_spi_send_command, JEDEC_REMS_INSIZE); + assert_int_equal(0, probe_spi_rems(&flashctx)); +} + +void probe_spi_res1_test_success(void **state) +{ + (void) state; /* unused */ + + /* setup initial test state. */ + struct flashctx flashctx = { .chip = &mock_chip }; + expect_memory(__wrap_spi_send_command, flash, + &flashctx, sizeof(flashctx)); + + will_return(__wrap_spi_send_command, JEDEC_RES_OUTSIZE); + will_return(__wrap_spi_send_command, JEDEC_RES); + will_return(__wrap_spi_send_command, JEDEC_RES_INSIZE + 1); + assert_int_equal(0, probe_spi_res2(&flashctx)); +} + +void probe_spi_res2_test_success(void **state) +{ + (void) state; /* unused */ + + /* setup initial test state. */ + struct flashctx flashctx = { .chip = &mock_chip }; + expect_memory(__wrap_spi_send_command, flash, + &flashctx, sizeof(flashctx)); + + will_return(__wrap_spi_send_command, JEDEC_RES_OUTSIZE); + will_return(__wrap_spi_send_command, JEDEC_RES); + will_return(__wrap_spi_send_command, JEDEC_RES_INSIZE + 1); + assert_int_equal(0, probe_spi_res2(&flashctx)); +} + +void probe_spi_res3_test_success(void **state) +{ + (void) state; /* unused */ + + /* setup initial test state. */ + struct flashctx flashctx = { .chip = &mock_chip }; + expect_memory(__wrap_spi_send_command, flash, + &flashctx, sizeof(flashctx)); + + will_return(__wrap_spi_send_command, JEDEC_RES_OUTSIZE); + will_return(__wrap_spi_send_command, JEDEC_RES); + will_return(__wrap_spi_send_command, JEDEC_RES_INSIZE + 2); + assert_int_equal(0, probe_spi_res3(&flashctx)); +} + +void probe_spi_at25f_test_success(void **state) +{ + (void) state; /* unused */ + + /* setup initial test state. */ + struct flashctx flashctx = { .chip = &mock_chip }; + expect_memory(__wrap_spi_send_command, flash, + &flashctx, sizeof(flashctx)); + + will_return(__wrap_spi_send_command, AT25F_RDID_OUTSIZE); + will_return(__wrap_spi_send_command, AT25F_RDID); + will_return(__wrap_spi_send_command, AT25F_RDID_INSIZE); + assert_int_equal(0, probe_spi_at25f(&flashctx)); +} diff --git a/tests/tests.c b/tests/tests.c index 32353fa6..82563acc 100644 --- a/tests/tests.c +++ b/tests/tests.c @@ -21,5 +21,18 @@ int main(void) { int ret = 0; + const struct CMUnitTest spi25_tests[] = { + cmocka_unit_test(spi_write_enable_test_success), + cmocka_unit_test(spi_write_disable_test_success), + cmocka_unit_test(probe_spi_rdid_test_success), + cmocka_unit_test(probe_spi_rdid4_test_success), + cmocka_unit_test(probe_spi_rems_test_success), + cmocka_unit_test(probe_spi_res1_test_success), + cmocka_unit_test(probe_spi_res2_test_success), + cmocka_unit_test(probe_spi_res3_test_success), + cmocka_unit_test(probe_spi_at25f_test_success), + }; + ret |= cmocka_run_group_tests_name("spi25.c tests", spi25_tests, NULL, NULL); + return ret; } diff --git a/tests/tests.h b/tests/tests.h index b088e24e..6eafeea3 100644 --- a/tests/tests.h +++ b/tests/tests.h @@ -1,4 +1,15 @@ #ifndef TESTS_H #define TESTS_H +/* spi25.c */ +void spi_write_enable_test_success(void **state); +void spi_write_disable_test_success(void **state); +void probe_spi_rdid_test_success(void **state); +void probe_spi_rdid4_test_success(void **state); +void probe_spi_rems_test_success(void **state); +void probe_spi_res1_test_success(void **state); +void probe_spi_res2_test_success(void **state); +void probe_spi_res3_test_success(void **state); +void probe_spi_at25f_test_success(void **state); + #endif /* TESTS_H */ |