diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-05-17 19:08:32 +0200 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2021-05-20 02:23:23 +0000 |
| commit | 59e344e904c2d5b5346803f9ab11b95c64bf05f0 (patch) | |
| tree | fe914c0aa3b9e49543ae547f584ed7ed98c09ea6 /stlinkv3_spi.c | |
| parent | 6c9dfdc971e42c1017a5edcab8012c8fcfaefacc (diff) | |
| download | flashrom-59e344e904c2d5b5346803f9ab11b95c64bf05f0.tar.gz flashrom-59e344e904c2d5b5346803f9ab11b95c64bf05f0.tar.bz2 flashrom-59e344e904c2d5b5346803f9ab11b95c64bf05f0.zip | |
Fix up handling of IFD chipsets
When `CHIPSET_400_SERIES_COMET_POINT` got added, the `chipset_names`
table was not updated. Add the missing entry and reorder it to be
next to `CHIPSET_300_SERIES_CANNON_POINT` for consistency.
Change-Id: I4f4b31ecf91c432a2e82a92e274cb91ac166e635
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/54429
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Sam McNally <sammc@google.com>
Diffstat (limited to 'stlinkv3_spi.c')
0 files changed, 0 insertions, 0 deletions