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| author | Neill Corlett <corlett@google.com> | 2022-01-20 21:50:30 -0500 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2022-02-01 22:22:03 +0000 |
| commit | e98b2d11846fe0f7a64e8739ec5d8e901a54dfc8 (patch) | |
| tree | d99b00509184ecce7c7ff5d57ff8210d0cf71c1f /spi95.c | |
| parent | 55aa056c7404e0912ed2e56b682512df7a0cca77 (diff) | |
| download | flashrom-e98b2d11846fe0f7a64e8739ec5d8e901a54dfc8.tar.gz flashrom-e98b2d11846fe0f7a64e8739ec5d8e901a54dfc8.tar.bz2 flashrom-e98b2d11846fe0f7a64e8739ec5d8e901a54dfc8.zip | |
Add mediatek_i2c_spi interface
Add a spi_master interface supporting MediaTek MST9U ISP mode.
Autodetect the bus type via I2C_FUNC_I2C, and use the appropriate
read/write commands, in case the MST9U is attached to smbus.
TEST=Successfully programmed SPI on test hardware.
Change-Id: I24adb14e7b4f7160e1c3ff941774064d5a81e820
Signed-off-by: Neill Corlett <corlett@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61288
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'spi95.c')
0 files changed, 0 insertions, 0 deletions