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| author | Sergii Dmytruk <sergii.dmytruk@3mdeb.com> | 2022-07-25 00:23:25 +0300 |
|---|---|---|
| committer | Anastasia Klimchuk <aklm@chromium.org> | 2022-11-19 06:59:30 +0000 |
| commit | 994de3ae946820dd6e03eb600e2e623e917845a4 (patch) | |
| tree | b395e86c94c73bcc2c256b26e98d16725fc2d599 /sb600spi.c | |
| parent | 125a328b4d8445f41c9fdde9e51c1b2bb40ad72e (diff) | |
| download | flashrom-994de3ae946820dd6e03eb600e2e623e917845a4.tar.gz flashrom-994de3ae946820dd6e03eb600e2e623e917845a4.tar.bz2 flashrom-994de3ae946820dd6e03eb600e2e623e917845a4.zip | |
writeprotect_ranges.c: add more range functions
Not all chips follow the same pattern. There are differences in how CMP
bit is treated or in block size used.
Change-Id: Ied7b27be2ee2426af8f473432e2b01a290de2365
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66212
Reviewed-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'sb600spi.c')
0 files changed, 0 insertions, 0 deletions