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author | Nikolai Artemiev <nartemiev@google.com> | 2022-11-02 12:11:02 +1100 |
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committer | Edward O'Callaghan <quasisec@chromium.org> | 2022-11-13 07:51:14 +0000 |
commit | 7be01fd4519b4a0a764052832e8831d8ed406e43 (patch) | |
tree | 9643ad0b68d63516d2d701b8ce9c8d694b057527 /nicintel.c | |
parent | c0813e7eddc553c5f8348ed1e1e4c8b00db93857 (diff) | |
download | flashrom-7be01fd4519b4a0a764052832e8831d8ed406e43.tar.gz flashrom-7be01fd4519b4a0a764052832e8831d8ed406e43.tar.bz2 flashrom-7be01fd4519b4a0a764052832e8831d8ed406e43.zip |
tests: ensure chip erase operation is executed
The `full_chip_erase_with_wp_dummyflasher_test_success` test case
checks that erasing a write-protected region of a dummyflasher chip
fails.
However erase optimization may cause the erase operation to be skipped
if the flash contents are already erased, so the erase operation appears
to succeed and the test case fails.
Writing a non-erased value to the chip ensures that an erase operation
will be executed and write protection will be properly tested.
BUG=b:237620197
BRANCH=none
TEST=ninja test
Change-Id: Ia00444dcd2ad96c64832a13201efbd064cd7302d
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/69130
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'nicintel.c')
0 files changed, 0 insertions, 0 deletions