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authorPeichao Wang <peichao.wang@bitland.corp-partner.google.com>2019-11-11 15:26:41 +0800
committerNico Huber <nico.h@gmx.de>2019-11-13 12:32:11 +0000
commit1a119498b43a8ed934bcfa0a16465aa4d6d2c74d (patch)
tree65860cc7d10787128bc90609af22e74ec1465f39 /flashchips.h
parent80e8dc4df72b72170190a91c31cdc0a0b5e08358 (diff)
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flashchips: Add W25Q128JW_DTR
Port the code from chromeos flashrom BUG=b:144297264 TEST=Tested using W25Q128JWDTR in SPI mode Signed-off-by: Peichao.Wang <peichao.wang@bitland.corp-partner.google.com> Change-Id: Ifc28878b17dc10da2cfd8f82fffbd57adb22799e Reviewed-on: https://review.coreboot.org/c/flashrom/+/36717 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'flashchips.h')
-rw-r--r--flashchips.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/flashchips.h b/flashchips.h
index 5ef7f9cb..2c2da6c4 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -939,6 +939,7 @@
#define WINBOND_NEX_W25Q128_W 0x6018 /* W25Q128FW; W25Q128FV in QPI mode */
#define WINBOND_NEX_W25Q128_V_M 0x7018 /* W25Q128JVSM */
#define WINBOND_NEX_W25Q256JV_M 0x7019 /* W25Q256JV_M (QE=0) */
+#define WINBOND_NEX_W25Q128_DTR 0x8018 /* W25Q128JW_DTR */
#define WINBOND_ID 0xDA /* Winbond */
#define WINBOND_W19B160BB 0x49