diff options
| author | Nico Huber <nico.h@gmx.de> | 2022-05-24 15:07:34 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2022-06-23 14:38:08 +0000 |
| commit | d90e2b3e2c37aa63e0dbb4e7359e8043704d815b (patch) | |
| tree | 0299fa7ae376cd15ea45bf8b2d7729c0dda0d9dd /flashchips.c | |
| parent | 418916428f38e86368c980cc7efdf5c9c615f7cd (diff) | |
| download | flashrom-d90e2b3e2c37aa63e0dbb4e7359e8043704d815b.tar.gz flashrom-d90e2b3e2c37aa63e0dbb4e7359e8043704d815b.tar.bz2 flashrom-d90e2b3e2c37aa63e0dbb4e7359e8043704d815b.zip | |
flashchips,spi25: Replace `.wrea_override` with FEATURE_4BA_EAR_1716
There are two competing sets of instructions to access the extended
address register of 4BA SPI chips. Some chips even support both sets.
So far, we assumed the 0xc5/0xc8 instructions by default and allowed
to override the write instructions with the `.wrea_override` field.
This has some disadvantages:
* The additional field is easily overlooked. So when adding a new
flash chip, one might assume only 0xc5/0xc8 are supported.
* We cannot describe flash chips completely that allow both
instructions (and some programmers may be picky about which
instructions can be used).
Therefore, replace the `.wrea_override` field with a feature flag.
Signed-off-by: Nico Huber <nico.h@gmx.de>
Change-Id: I6d82f24898acd0789203516a7456fd785907bc10
Ticket: https://ticket.coreboot.org/issues/357
Reviewed-on: https://review.coreboot.org/c/flashrom/+/64636
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Diffstat (limited to 'flashchips.c')
| -rw-r--r-- | flashchips.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/flashchips.c b/flashchips.c index c740d1c8..b45054c4 100644 --- a/flashchips.c +++ b/flashchips.c @@ -16795,7 +16795,8 @@ const struct flashchip flashchips[] = { .total_size = 32768, .page_size = 256, /* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_EAR7, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | + FEATURE_4BA_NATIVE | FEATURE_4BA_ENTER_EAR7 | FEATURE_4BA_EAR_1716, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -16829,7 +16830,6 @@ const struct flashchip flashchips[] = { .write = spi_chip_write_256, /* Multi I/O supported */ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, - .wrea_override = 0x17, }, { |