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| author | Angel Pons <th3fanbus@gmail.com> | 2018-08-21 03:30:58 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2018-08-22 10:26:51 +0000 |
| commit | ccfa8f9d9a68b1e4238d2dbbc4e9c8bcf9bae8a6 (patch) | |
| tree | d8b4b128709d5c5173269494c56d388c8e8434dd /chipset_enable.c | |
| parent | e2c90c45f7d1dbdd02269f0a8f3c95cb8ee5fa91 (diff) | |
| download | flashrom-ccfa8f9d9a68b1e4238d2dbbc4e9c8bcf9bae8a6.tar.gz flashrom-ccfa8f9d9a68b1e4238d2dbbc4e9c8bcf9bae8a6.tar.bz2 flashrom-ccfa8f9d9a68b1e4238d2dbbc4e9c8bcf9bae8a6.zip | |
chipset_enable.c: Mark Intel HM55 as DEP
Tested reading, writing and erasing the internal flash chip using an HP
630 laptop with an Intel HM55. However, since all ME-enabled chipsets
are marked as DEP instead of OK, this one shall follow suit as well.
Change-Id: Iaedd5bdc34dfff9b8588a3f4e1ad46460077fdf9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/28253
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'chipset_enable.c')
| -rw-r--r-- | chipset_enable.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index 42f67282..566b1fb0 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1805,7 +1805,7 @@ const struct penable chipset_enables[] = { {0x8086, 0x3b06, DEP, "Intel", "H55", enable_flash_pch5}, {0x8086, 0x3b07, DEP, "Intel", "QM57", enable_flash_pch5}, {0x8086, 0x3b08, NT, "Intel", "H57", enable_flash_pch5}, - {0x8086, 0x3b09, NT, "Intel", "HM55", enable_flash_pch5}, + {0x8086, 0x3b09, DEP, "Intel", "HM55", enable_flash_pch5}, {0x8086, 0x3b0a, NT, "Intel", "Q57", enable_flash_pch5}, {0x8086, 0x3b0b, NT, "Intel", "HM57", enable_flash_pch5}, {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_pch5}, |