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author | Subrata Banik <subratabanik@google.com> | 2022-04-07 19:49:15 +0000 |
---|---|---|
committer | Anastasia Klimchuk <aklm@chromium.org> | 2022-05-03 05:05:25 +0000 |
commit | d3bd399f673aeac07873d0117ec17fd8cc1e497b (patch) | |
tree | 66262ad8b85660ae82e67c82215d71bdaebfd388 | |
parent | e7d6caffecf7b207d0ff7d51441140b4b47a289e (diff) | |
download | flashrom-d3bd399f673aeac07873d0117ec17fd8cc1e497b.tar.gz flashrom-d3bd399f673aeac07873d0117ec17fd8cc1e497b.tar.bz2 flashrom-d3bd399f673aeac07873d0117ec17fd8cc1e497b.zip |
ichspi: Introduce HSFC_FDBC_VAL(n) macro
This patch introduces HSFC_FDBC_VAL(n) macro to use in SPI read and
write operations.
BUG=b:223630977
TEST=Able to perform read/write/erase operation on PCH 600 series
chipset (board name: Brya).
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ie2512c85de9fc21286234b97f5842ecef1729787
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62892
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
-rw-r--r-- | ichspi.c | 5 |
1 files changed, 3 insertions, 2 deletions
@@ -131,6 +131,7 @@ /* 3-7: reserved */ #define HSFC_FDBC_OFF 8 /* 8-13: Flash Data Byte Count */ #define HSFC_FDBC (0x3f << HSFC_FDBC_OFF) +#define HSFC_FDBC_VAL(n) (((n) << HSFC_FDBC_OFF) & HSFC_FDBC) /* 14: reserved */ #define HSFC_SME_OFF 15 /* 15: SPI SMI# Enable */ #define HSFC_SME (0x1 << HSFC_SME_OFF) @@ -1473,7 +1474,7 @@ static int ich_hwseq_read(struct flashctx *flash, uint8_t *buf, hsfc &= ~hwseq_data.hsfc_fcycle; /* set read operation */ hsfc &= ~HSFC_FDBC; /* clear byte count */ /* set byte count */ - hsfc |= (((block_len - 1) << HSFC_FDBC_OFF) & HSFC_FDBC); + hsfc |= HSFC_FDBC_VAL(block_len - 1); hsfc |= HSFC_FGO; /* start */ REGWRITE16(ICH9_REG_HSFC, hsfc); @@ -1520,7 +1521,7 @@ static int ich_hwseq_write(struct flashctx *flash, const uint8_t *buf, unsigned hsfc |= (0x2 << HSFC_FCYCLE_OFF); /* set write operation */ hsfc &= ~HSFC_FDBC; /* clear byte count */ /* set byte count */ - hsfc |= (((block_len - 1) << HSFC_FDBC_OFF) & HSFC_FDBC); + hsfc |= HSFC_FDBC_VAL(block_len - 1); hsfc |= HSFC_FGO; /* start */ REGWRITE16(ICH9_REG_HSFC, hsfc); |