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author | Uwe Hermann <uwe@hermann-uwe.de> | 2009-06-19 15:54:39 +0000 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2009-06-19 15:54:39 +0000 |
commit | a8b3727a1e68e6579498f1ad25baa02bd7c5c2bf (patch) | |
tree | 32360db687534ad972e7dc004ac277b4fc39805b | |
parent | 95b67f7ad54a7280ac9af6e8c839b373bbcd5503 (diff) | |
download | flashrom-a8b3727a1e68e6579498f1ad25baa02bd7c5c2bf.tar.gz flashrom-a8b3727a1e68e6579498f1ad25baa02bd7c5c2bf.tar.bz2 flashrom-a8b3727a1e68e6579498f1ad25baa02bd7c5c2bf.zip |
Add support for the AMD Am29F010A/B chips
Also, add support for the Silicon Image 3112(A) SATA controller.
Both have been tested by Andrew Morgan <ziltro@ziltro.com> on hardware
and work fine.
Corresponding to flashrom svn r613.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Andrew Morgan <ziltro@ziltro.com>
-rw-r--r-- | flashchips.c | 16 | ||||
-rw-r--r-- | flashchips.h | 1 | ||||
-rw-r--r-- | satasii.c | 1 |
3 files changed, 18 insertions, 0 deletions
diff --git a/flashchips.c b/flashchips.c index 35be912a..bcfd264e 100644 --- a/flashchips.c +++ b/flashchips.c @@ -41,6 +41,22 @@ struct flashchip flashchips[] = { { .vendor = "AMD", + .name = "Am29F010A/B", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = AMD_ID, + .model_id = AM_29F010B, /* Same as Am29F010A */ + .total_size = 128, + .page_size = 16 * 1024, + .tested = TEST_OK_PREW, + .probe = probe_29f040b, + .probe_timing = TIMING_FIXME, + .erase = erase_29f040b, + .write = write_pm29f002, + .read = read_memmapped, + }, + + { + .vendor = "AMD", .name = "Am29F002(N)BB", .bustype = CHIP_BUSTYPE_NONSPI, .manufacture_id = AMD_ID, diff --git a/flashchips.h b/flashchips.h index e9d977dc..0b58e509 100644 --- a/flashchips.h +++ b/flashchips.h @@ -39,6 +39,7 @@ #define ALLIANCE_ID 0x52 /* Alliance Semiconductor */ #define AMD_ID 0x01 /* AMD */ +#define AM_29F010B 0x20 /* Same as Am29F010A */ #define AM_29F002BT 0xB0 #define AM_29F002BB 0x34 #define AM_29F040B 0xA4 @@ -35,6 +35,7 @@ uint16_t id; struct pcidev_status satas_sii[] = { {0x1095, 0x0680, PCI_OK, "Silicon Image", "PCI0680 Ultra ATA-133 Host Ctrl"}, + {0x1095, 0x3112, PCI_OK, "Silicon Image", "SiI 3112 [SATALink/SATARaid] SATA Ctrl"}, {0x1095, 0x3114, PCI_OK, "Silicon Image", "SiI 3114 [SATALink/SATARaid] SATA Ctrl"}, {0x1095, 0x3124, PCI_NT, "Silicon Image", "SiI 3124 PCI-X SATA Ctrl"}, {0x1095, 0x3132, PCI_OK, "Silicon Image", "SiI 3132 SATA Raid II Ctrl"}, |