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| author | Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> | 2012-09-22 01:38:06 +0000 |
|---|---|---|
| committer | Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> | 2012-09-22 01:38:06 +0000 |
| commit | 5609f9d408645657ef0dd2ca986ada5aaad4c875 (patch) | |
| tree | 61f34750e39b1c9ec0be45555a8ca5b4125bc75b | |
| parent | eb58257b9650b9191d8b987e0b214fed1ad2b77a (diff) | |
| download | flashrom-5609f9d408645657ef0dd2ca986ada5aaad4c875.tar.gz flashrom-5609f9d408645657ef0dd2ca986ada5aaad4c875.tar.bz2 flashrom-5609f9d408645657ef0dd2ca986ada5aaad4c875.zip | |
Generify a25.c's SRWD printing function and move it to spi25.c
Corresponding to flashrom svn r1602.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
| -rw-r--r-- | a25.c | 14 | ||||
| -rw-r--r-- | chipdrivers.h | 1 | ||||
| -rw-r--r-- | spi25.c | 14 |
3 files changed, 14 insertions, 15 deletions
@@ -23,12 +23,6 @@ /* Prettyprint the status register. Works for AMIC A25L series. */ -static void spi_prettyprint_status_register_amic_a25_srwd(uint8_t status) -{ - msg_cdbg("Chip status register: Status Register Write Disable " - "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not "); -} - int spi_prettyprint_status_register_amic_a25l05p(struct flashctx *flash) { uint8_t status; @@ -36,7 +30,7 @@ int spi_prettyprint_status_register_amic_a25l05p(struct flashctx *flash) status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); - spi_prettyprint_status_register_amic_a25_srwd(status); + spi_prettyprint_status_register_srwd(status); spi_prettyprint_status_register_bit(status, 6); spi_prettyprint_status_register_bit(status, 5); spi_prettyprint_status_register_bit(status, 4); @@ -52,7 +46,7 @@ int spi_prettyprint_status_register_amic_a25l40p(struct flashctx *flash) status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); - spi_prettyprint_status_register_amic_a25_srwd(status); + spi_prettyprint_status_register_srwd(status); spi_prettyprint_status_register_bit(status, 6); spi_prettyprint_status_register_bit(status, 5); spi_prettyprint_status_register_bp(status, 2); @@ -67,7 +61,7 @@ int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash) status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); - spi_prettyprint_status_register_amic_a25_srwd(status); + spi_prettyprint_status_register_srwd(status); msg_cdbg("Chip status register: Sector Protect Size (SEC) " "is %i KB\n", (status & (1 << 6)) ? 4 : 64); msg_cdbg("Chip status register: Top/Bottom (TB) " @@ -85,7 +79,7 @@ int spi_prettyprint_status_register_amic_a25lq032(struct flashctx *flash) status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); - spi_prettyprint_status_register_amic_a25_srwd(status); + spi_prettyprint_status_register_srwd(status); msg_cdbg("Chip status register: Sector Protect Size (SEC) " "is %i KB\n", (status & (1 << 6)) ? 4 : 64); msg_cdbg("Chip status register: Top/Bottom (TB) " diff --git a/chipdrivers.h b/chipdrivers.h index ea6c35fe..1ef4959b 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -53,6 +53,7 @@ uint8_t spi_read_status_register(struct flashctx *flash); int spi_write_status_register(struct flashctx *flash, int status); void spi_prettyprint_status_register_bit(uint8_t status, int bit); void spi_prettyprint_status_register_bp(uint8_t status, int bp); +void spi_prettyprint_status_register_srwd(uint8_t status); void spi_prettyprint_status_register_welwip(uint8_t status); int spi_prettyprint_status_register(struct flashctx *flash); int spi_disable_blockprotect(struct flashctx *flash); @@ -315,7 +315,13 @@ uint8_t spi_read_status_register(struct flashctx *flash) return readarr[0]; } -/* Prettyprint the status register. Common definitions. */ +/* Common highest bit: Status Register Write Disable (SRWD). */ +void spi_prettyprint_status_register_srwd(uint8_t status) +{ + msg_cdbg("Chip status register: Status Register Write Disable (SRWD) is %sset\n", + (status & (1 << 7)) ? "" : "not "); +} + void spi_prettyprint_status_register_welwip(uint8_t status) { msg_cdbg("Chip status register: Write Enable Latch (WEL) is " @@ -366,10 +372,8 @@ static void spi_prettyprint_status_register_common(uint8_t status) */ void spi_prettyprint_status_register_st_m25p(uint8_t status) { - msg_cdbg("Chip status register: Status Register Write Disable " - "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not "); - msg_cdbg("Chip status register: Bit 6 is " - "%sset\n", (status & (1 << 6)) ? "" : "not "); + spi_prettyprint_status_register_srwd(status); + spi_prettyprint_status_register_bit(status, 6); spi_prettyprint_status_register_common(status); } |