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author | Ronald G. Minnich <rminnich@gmail.com> | 2002-04-10 16:01:38 +0000 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2002-04-10 16:01:38 +0000 |
commit | 213ee71ff4f7611a150faf4e85754f4630bbcfd4 (patch) | |
tree | 9cefe7ae90c20ab95dbcdd1f0d1bf5d05683fa0b | |
parent | 3193a90719249d5849aa854e456fa46b2be81e50 (diff) | |
download | flashrom-213ee71ff4f7611a150faf4e85754f4630bbcfd4.tar.gz flashrom-213ee71ff4f7611a150faf4e85754f4630bbcfd4.tar.bz2 flashrom-213ee71ff4f7611a150faf4e85754f4630bbcfd4.zip |
Support for the 39sf020
Corresponding to coreboot v1 svn r544.
-rw-r--r-- | flash_rom.c | 2 | ||||
-rw-r--r-- | sst39sf020.c | 47 |
2 files changed, 36 insertions, 13 deletions
diff --git a/flash_rom.c b/flash_rom.c index 171fe3e9..24b07a79 100644 --- a/flash_rom.c +++ b/flash_rom.c @@ -48,7 +48,7 @@ struct flashchip flashchips[] = { {"SST28SF040A", SST_ID, SST_28SF040, NULL, 512, 256, probe_28sf040, erase_28sf040, write_28sf040}, {"SST39SF020A", SST_ID, SST_39SF020, NULL, 256, 4096, - probe_jedec, erase_jedec, write_39sf020}, + probe_39sf020, erase_39sf020, write_39sf020}, {"W29C020C", WINBOND_ID, W_29C020C, NULL, 256, 128, probe_jedec, erase_jedec, write_jedec}, {NULL,} diff --git a/sst39sf020.c b/sst39sf020.c index 3c310a77..49e695f8 100644 --- a/sst39sf020.c +++ b/sst39sf020.c @@ -72,13 +72,19 @@ static __inline__ erase_sector_39sf020 (volatile char * bios, unsigned long addr toggle_ready_jedec(bios); } -static __inline__ write_sector_39sf020(volatile char * bios, unsigned char * src, - volatile unsigned char * dst, unsigned int page_size) +static __inline__ write_sector_39sf020(volatile char * bios, + unsigned char * src, + volatile unsigned char * dst, + unsigned int page_size) { int i; volatile char *Temp; for (i = 0; i < page_size; i++) { + if (*dst != 0xff) { + printf("FATAL: dst %p not erased (val 0x%x\n", dst, *dst); + return; + } /* transfer data from source to destination */ if (*src == 0xFF) { dst++, src++; @@ -91,8 +97,11 @@ static __inline__ write_sector_39sf020(volatile char * bios, unsigned char * src *Temp = 0x55; Temp = bios + 0x5555; *Temp = 0xA0; - *dst++ = *src++; + *dst = *src; toggle_ready_jedec(bios); + if (*dst != *src) printf("BAD! dst 0x%x val 0x%x src 0x%x\n", + dst, *dst, *src); + dst++, src++; } } @@ -127,15 +136,29 @@ int probe_39sf020 (struct flashchip * flash) int erase_39sf020 (struct flashchip * flash) { - volatile char * bios = flash->virt_addr; - - unprotect_39sf020 (bios); - *bios = CHIP_ERASE; - *bios = CHIP_ERASE; - protect_39sf020 (bios); - + volatile unsigned char * bios = flash->virt_addr; + volatile unsigned char *Temp; + /* Issue the Sector Erase command to 39SF020 */ + printf(__FUNCTION__ " bios is %p\n", bios); + Temp = bios + 0x5555; /* set up address to be C000:5555h */ + *Temp = 0xAA; /* write data 0xAA to the address */ myusec_delay(10); - toggle_ready_jedec(bios); + Temp = bios + 0x2AAA; /* set up address to be C000:2AAAh */ + *Temp = 0x55; /* write data 0x55 to the address */ + myusec_delay(10); + Temp = bios + 0x5555; /* set up address to be C000:5555h */ + *Temp = 0x80; /* write data 0x80 to the address */ + myusec_delay(10); + Temp = bios + 0x5555; /* set up address to be C000:5555h */ + *Temp = 0xAA; /* write data 0xAA to the address */ + myusec_delay(10); + Temp = bios + 0x2AAA; /* set up address to be C000:2AAAh */ + *Temp = 0x55; /* write data 0x55 to the address */ + myusec_delay(10); + Temp = bios + 0x5555; /* set up address to be C000:5555h */ + *Temp = 0x10; /* write data 0x55 to the address */ + + myusec_delay(20000); } int write_39sf020 (struct flashchip * flash, char * buf) @@ -145,7 +168,7 @@ int write_39sf020 (struct flashchip * flash, char * buf) volatile char * bios = flash->virt_addr; // unprotect_39sf020 (bios); - + erase_39sf020(flash); printf ("Programming Page: "); for (i = 0; i < total_size/page_size; i++) { /* erase the page before programming */ |