diff options
Diffstat (limited to 'fpga/hp_lcd_driver/ep4ce15f23c8.mk')
| -rw-r--r-- | fpga/hp_lcd_driver/ep4ce15f23c8.mk | 184 |
1 files changed, 184 insertions, 0 deletions
diff --git a/fpga/hp_lcd_driver/ep4ce15f23c8.mk b/fpga/hp_lcd_driver/ep4ce15f23c8.mk new file mode 100644 index 0000000..713574d --- /dev/null +++ b/fpga/hp_lcd_driver/ep4ce15f23c8.mk @@ -0,0 +1,184 @@ +FAMILY=Cyclone IV E +PART=EP4CE15F23C8 +CPART_1=CFI_64Mb +CPART_2=QSPI_64Mb +#EPCS16 +TOP=hp_lcd_driver +BUILD=build_${BOARD} +OF=output_files + +PROJECT = hp_lcd_driver +VSRCS =delay.vhdl synchronizer.vhdl debounce.vhdl edge_det.vhdl input_formatter.vhdl input_stage.vhdl output_formatter.vhdl output_analog.vhdl tmds_encoder.vhdl tmds_encode.vhdl tmds_phy_cyclone4.vhdl tmds_output_cyclone4.vhdl output_stage.vhdl clkgen_cyclone4.vhdl vram_cyclone4.vhdl hp_lcd_driver.vhdl +IPS= vram_cyclone4_impl.vhdl clkgen_cyclone4_a_impl.vhdl clkgen_cyclone4_b_impl.vhdl + +DESIGN_NAME=${TOP} + +MAP_ARGS = --smart +FIT_ARGS = +ASM_ARGS = +STA_ARGS = +CPF_ARGS = -c -q 1MHZ -g 3.3 -n p + +GEN_VSRCS=${IPS:%.vhdl=${BUILD}/%.vhd} +QIP=${GEN_VSRCS:%.vhd=%.qip} + +BASE=${BUILD}/${DESIGN_NAME} +QSF=${BASE}.qsf +QPF=${BASE}.qpf +MAP=${BUILD}/${OF}/$(PROJECT).map.rpt +FIT=${BUILD}/${OF}/$(PROJECT).fit.rpt +ASM=${BUILD}/${OF}/$(PROJECT).asm.rpt +ASM=${BUILD}/${OF}/$(PROJECT).sta.rpt +SOF=${BUILD}/${OF}/${PROJECT}.sof +COF=${BUILD}/${OF}/${PROJECT}.cof +POF=${BUILD}/${OF}/${PROJECT}.pof +#JIC=${BUILD}/${OF}/${PROJECT}.jic +CDF=${BUILD}/${OF}/${PROJECT}.cdf +SVF=${BUILD}/${PROJECT}.svf +PSVF=${BUILD}/${PROJECT}-p.svf + +default:${SVF} ${PSVF} + echo ${PSVF} + + +${BUILD}/%.vhd ${BUILD}/%.qip:%.vhdl + cat $< > ${BUILD}/${<:%.vhdl=%.vhd} + (cd ${BUILD} && ../scripts/run_in_x run_quartus qmegawiz -silent $(call relpath,${BUILD}/${<:%.vhdl=%.vhd},${BUILD})) + + +${QSF}: ${PRJ} ${DESIGN_NAME}.${BOARD}_qsft + mkdir -p ${BUILD} + rm -f $@ + echo 'set_global_assignment -name TOP_LEVEL_ENTITY ${TOP}' >> $@ + echo 'set_global_assignment -name FAMILY "${FAMILY}"' >> $@ + echo 'set_global_assignment -name PROJECT_OUTPUT_DIRECTORY ${OF}' >> $@ + echo 'set_global_assignment -name DEVICE ${PART}' >> $@ + cat ${DESIGN_NAME}.${BOARD}_qsft >> $@ + for file in ${GEN_VSRCS} ${VSRCS}; do \ + echo "set_global_assignment -name VHDL_FILE $$(realpath -m --relative-to=${BUILD} $${file})" >> $@; \ + done + + + +${QPF}: + mkdir -p ${BUILD} + rm -f $@ + echo 'PROJECT_REVISION = "${TOP}"' > $@ + + +map: ${MAP} +${MAP}: ${VSRCS} ${QPF} ${QSF} ${GEN_VSRCS} ${QIP} + (cd ${BUILD} && run_quartus quartus_map $(MAP_ARGS) ${PROJECT}) + +fit: ${FIT} +${FIT}:${MAP} + (cd ${BUILD} && run_quartus quartus_fit $(FIT_ARGS) $(PROJECT)) + +asm: ${ASM} +sof: ${ASM} +${SOF} ${ASM}:${FIT} + (cd ${BUILD} && run_quartus quartus_asm $(ASM_ARGS) $(PROJECT)) + +sta: ${STA} +${STA}:${FIT} + (cd ${BUILD} && run_quartus quartus_sta $(STA_ARGS) $(PROJECT)) + + +svf:${SVF} +${SVF}:${SOF} + (cd ${BUILD} && run_quartus quartus_cpf ${CPF_ARGS} $(call relpath,$<,${BUILD}) $(call relpath,$@,${BUILD}) ) +#${JIC}:${SOF} +# (cd ${BUILD} && run_quartus quartus_cpf -c -s ${PART} -d ${CPART} $(call relpath,$<,${BUILD}) $(call relpath,$@,${BUILD}) ) +#${SVFP}:${JIC} +# (cd ${BUILD} && run_quartus quartus_cpf ${CPF_ARGS} $(call relpath,$<,${BUILD}) $(call relpath,$@,${BUILD}) ) + + +${COF}: ${SOF} + echo '<?xml version="1.0" encoding="US-ASCII" standalone="yes"?>' > $@ + echo '<cof>' >> $@ + echo ' <eprom_name>${CPART_1}</eprom_name>' >> $@ + echo ' <output_filename>$(call relpath,${POF},${BUILD})</output_filename>' >> $@ + echo ' <n_pages>1</n_pages>' >> $@ + echo ' <width>1</width>' >> $@ + echo ' <mode>0</mode>' >> $@ + echo ' <sof_data>' >> $@ + echo ' <user_name>Page_0</user_name>' >> $@ + echo ' <page_flags>1</page_flags>' >> $@ + echo ' <bit0>' >> $@ + echo ' <sof_filename>$(call relpath,${SOF},${BUILD})</sof_filename>' >> $@ + echo ' </bit0>' >> $@ + echo ' </sof_data>' >> $@ + echo ' <version>5</version>' >> $@ + echo ' <create_cvp_file>0</create_cvp_file>' >> $@ + echo ' <options>' >> $@ + echo ' <map_file>1</map_file>' >> $@ + echo ' <option_start_address>0</option_start_address>' >> $@ + echo ' <dynamic_compression>0</dynamic_compression>' >> $@ + echo ' </options>' >> $@ + echo '</cof>' >> $@ + +${POF}:${COF} + (cd ${BUILD} && run_quartus quartus_cpf -c $(call relpath,$<,${BUILD})) +# (cd ${BUILD} && run_quartus quartus_cpf -c -d EPCQ64 $(call relpath,$<,${BUILD}) $(call relpath,$@,${BUILD}) ) + +${CDF}:${POF} + echo 'JedecChain;' > $@ + echo ' FileRevision(JESD32A);' >> $@ + echo ' DefaultMfr(6E);' >> $@ + echo '' >> $@ + echo ' P ActionCode(Ign)' >> $@ + echo ' Device PartName(${CPART_2}) MfrSpec(OpMask(0) SEC_Device(${CPART_2}) Child_OpMask(3 0 0 0) FullPath("$(call relpath,${SOF},${BUILD})") PFLPath("$(call relpath,${POF},${BUILD})"));' >> $@ + echo '' >> $@ + echo 'ChainEnd;' >> $@ + echo '' >> $@ + echo 'AlteraBegin;' >> $@ + echo ' ChainType(JTAG);' >> $@ + echo 'AlteraEnd;' >> $@ + +${PSVF}:${CDF} + (cd ${BUILD} && run_quartus quartus_cpf ${CPF_ARGS} $(call relpath,$<,${BUILD}) $(call relpath,$@,${BUILD}) ) + + + +tidy: + git diff --exit-code -s ${VSRCS} + for i in ${VSRCS}; do /bin/cp -f $$i $$i.orig && scripts/vhdl-pretty < $$i.orig > $$i; done + + + +# +# +##OPENOCD=openocd -f interface/altera-usb-blaster.cfg -f cpld/altera-epm240.cfg +# +#FIT_ARGS = +#ASM_ARGS = +# +#SVF=${PROJECT}.svf +# +# +# +#default: ${SVF} +# +#${SVF}: ${BUILD}/${PROJECT}.svf +# cat $< > $@ || /bin/rm -f $@ +# +#program: ${SVF} +# ${OPENOCD} -c "init; svf $<; exit" +# +#all: ${BUILD}/$(PROJECT).asm.rpt ${BUILD}/$(PROJECT).sta.rpt ${BUILD}/${PROJECT}.svf +# +clean: + rm -rf db ${BUILD} *.orig *.bak incremental_db db + +# +# +# +# +# +# + +#tidy: +# for i in ${SOURCE_FILES}; do /bin/cp -f $$i $$i.orig && scripts/vhdl-pretty < $$i.orig > $$i; done +# +# + |