diff options
Diffstat (limited to 'polycom_recv/gpio.c')
-rw-r--r-- | polycom_recv/gpio.c | 115 |
1 files changed, 115 insertions, 0 deletions
diff --git a/polycom_recv/gpio.c b/polycom_recv/gpio.c new file mode 100644 index 0000000..33b3cda --- /dev/null +++ b/polycom_recv/gpio.c @@ -0,0 +1,115 @@ +#include "project.h" + +static os_timer_t gpio_timer; + + +static struct gpio +{ + int id; + uint32_t pin; + uint32_t func; + uint32_t bit; + int pull; + int state; +} gpios[] = +{ + { + 14, PERIPHS_IO_MUX_MTMS_U, FUNC_GPIO14, BIT14, 0}, + { + 12, PERIPHS_IO_MUX_MTDI_U, FUNC_GPIO12, BIT12, 0}, + { + 13, PERIPHS_IO_MUX_MTCK_U, FUNC_GPIO13, BIT13, 0}, + { + 0, PERIPHS_IO_MUX_GPIO0_U, FUNC_GPIO0, BIT0, 0} +}; + +#define N_GPIOS (sizeof(gpios)/sizeof(gpios[0])) + +static uint32_t mask; + +static os_timer_t gpio_timer; +static os_timer_t gpio_intr_timer; + +static int flash; + + +uint32_t ICACHE_FLASH_ATTR +gpio_read (void) +{ + return gpio_input_get () & mask; +} + + + +static void ICACHE_FLASH_ATTR +gpio_dispatch (void) +{ + uint32_t v = 0; + int i; + + for (i = 0; i < N_GPIOS; ++i) + { + if ((gpios[i].state == 1 && flash) || (gpios[i].state == 2)) + v |= gpios[i].bit; + } + gpio_output_set (v, (~v) & mask, mask, 0); +} + + + + +static void ICACHE_FLASH_ATTR +gpio_timer_cb (void *arg) +{ + flash = !flash; + + gpio_dispatch (); +} + + +void ICACHE_FLASH_ATTR +gpio_write (int a, int b, int c, int d) +{ + uint32_t v = 0; + + gpios[0].state = a; + gpios[1].state = b; + gpios[2].state = c; + gpios[3].state = d; + + gpio_dispatch (); +} + + +void ICACHE_FLASH_ATTR +gpio_init (void) +{ + int i; + + for (i = 0; i < N_GPIOS; ++i) + { + PIN_FUNC_SELECT (gpios[i].pin, gpios[i].func); + if (gpios[i].pull) + PIN_PULLUP_EN (gpios[i].pin); + else + PIN_PULLUP_DIS (gpios[i].pin); + +/* disable drivers */ + gpio_output_set (0, 0, gpios[i].bit, 0); + + gpio_register_set (GPIO_PIN_ADDR (gpios[i].id), + GPIO_PIN_INT_TYPE_SET (GPIO_PIN_INTR_DISABLE) | + GPIO_PIN_PAD_DRIVER_SET (GPIO_PAD_DRIVER_ENABLE) | + GPIO_PIN_SOURCE_SET (GPIO_AS_PIN_SOURCE)); + + GPIO_REG_WRITE (GPIO_STATUS_W1TC_ADDRESS, gpios[i].bit); + + mask |= gpios[i].bit; + } + + os_timer_disarm (&gpio_timer); + os_timer_setfn (&gpio_timer, (os_timer_func_t *) gpio_timer_cb, NULL); + os_timer_arm (&gpio_timer, 500, 1); + + +} |