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| author | Mike Stirling <opensource@mikestirling.co.uk> | 2011-08-02 22:32:14 +0100 |
|---|---|---|
| committer | Mike Stirling <opensource@mikestirling.co.uk> | 2011-08-02 22:32:14 +0100 |
| commit | e28e9f3ac11db036e1b3c71493ecbd14a8d59eac (patch) | |
| tree | 78d3eb0c743da146bdd5a552e332a627d57f3fb8 /bbc_micro_de1.qsf | |
| parent | b8eed4413b7d093d8df73dc2c5ffc83462a4a2ed (diff) | |
| download | fpga-bbc-e28e9f3ac11db036e1b3c71493ecbd14a8d59eac.tar.gz fpga-bbc-e28e9f3ac11db036e1b3c71493ecbd14a8d59eac.tar.bz2 fpga-bbc-e28e9f3ac11db036e1b3c71493ecbd14a8d59eac.zip | |
Fixed missing gate in DISEN which meant that blank lines in modes 3 and 6 weren't blank. Hopefully fixed handling of interlaced sync+video mode in CRTC ready for SAA5050 implementation.
Diffstat (limited to 'bbc_micro_de1.qsf')
| -rw-r--r-- | bbc_micro_de1.qsf | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/bbc_micro_de1.qsf b/bbc_micro_de1.qsf index fd68838..e5324f6 100644 --- a/bbc_micro_de1.qsf +++ b/bbc_micro_de1.qsf @@ -509,6 +509,7 @@ set_location_assignment PIN_U20 -to SD_nCS set_location_assignment PIN_V20 -to SD_SCLK
set_location_assignment PIN_Y20 -to SD_MOSI
set_location_assignment PIN_W20 -to SD_MISO
+set_global_assignment -name VHDL_FILE saa5050.vhd
set_global_assignment -name VHDL_FILE i2s_intf.vhd
set_global_assignment -name VHDL_FILE i2c_loader.vhd
set_global_assignment -name VHDL_FILE "sn76489-1.0/sn76489_comp_pack-p.vhd"
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