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| author | root <root@ka-ata-killa.ourano.james.local> | 2021-02-24 23:45:58 +0000 |
|---|---|---|
| committer | root <root@ka-ata-killa.ourano.james.local> | 2021-02-24 23:45:58 +0000 |
| commit | 1575d4f53805f177474b5bb96daebede9b2dfb73 (patch) | |
| tree | 91f6819f7280088bb9344fae7dbef8c43a0a04c0 /de1/fpga-flash-nor/de1flash.fit.smsg | |
| download | base-master.tar.gz base-master.tar.bz2 base-master.zip | |
Diffstat (limited to 'de1/fpga-flash-nor/de1flash.fit.smsg')
| -rw-r--r-- | de1/fpga-flash-nor/de1flash.fit.smsg | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/de1/fpga-flash-nor/de1flash.fit.smsg b/de1/fpga-flash-nor/de1flash.fit.smsg new file mode 100644 index 0000000..7121cbb --- /dev/null +++ b/de1/fpga-flash-nor/de1flash.fit.smsg @@ -0,0 +1,8 @@ +Extra Info (176273): Performing register packing on registers with non-logic cell location assignments +Extra Info (176274): Completed register packing on registers with non-logic cell location assignments +Extra Info (176236): Started Fast Input/Output/OE register processing +Extra Info (176237): Finished Fast Input/Output/OE register processing +Extra Info (176238): Start inferring scan chains for DSP blocks +Extra Info (176239): Inferring scan chains for DSP blocks is complete +Extra Info (176248): Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density +Extra Info (176249): Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks |